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Henk-Jan Lebbink edited this page Jun 18, 2019 · 9 revisions

Welcome to the Asm-Dude wiki!

This wiki contains pages for all existing x86 instructions that I could generate from the official Intel manuals. The Python code to scrape these pages can be found in asm-dude/VS/Python/intel-doc-2-md/.

AAA ASCII Adjust After Addition 8086
AAD ASCII Adjust AX Before Division 8086
AAM ASCII Adjust AX After Multiply 8086
AAS ASCII Adjust AL After Subtraction 8086
ADC Add with Carry 8086 386 X64
ADCX Unsigned Integer Addition of Two Operands with Carry Flag ADX
ADD Add 8086 386 X64
ADDPD Add Packed Double-Precision Floating-Point Values SSE2
VADDPD Add Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
ADDPS Add Packed Single-Precision Floating-Point Values SSE
VADDPS Add Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
ADDSD Add Scalar Double-Precision Floating-Point Values SSE2
VADDSD Add Scalar Double-Precision Floating-Point Values AVX AVX512_F
ADDSS Add Scalar Single-Precision Floating-Point Values SSE
VADDSS Add Scalar Single-Precision Floating-Point Values AVX AVX512_F
ADDSUBPD Packed Double-FP Add/Subtract SSE3
VADDSUBPD Packed Double-FP Add/Subtract AVX
ADDSUBPS Packed Single-FP Add/Subtract SSE3
VADDSUBPS Packed Single-FP Add/Subtract AVX
ADOX Unsigned Integer Addition of Two Operands with Overflow Flag ADX
AESDEC Perform One Round of an AES Decryption Flow AES
VAESDEC Perform One Round of an AES Decryption Flow AES AVX
AESDECLAST Perform Last Round of an AES Decryption Flow AES
VAESDECLAST Perform Last Round of an AES Decryption Flow AES AVX
AESENC Perform One Round of an AES Encryption Flow AES
VAESENC Perform One Round of an AES Encryption Flow AES AVX
AESENCLAST Perform Last Round of an AES Encryption Flow AES
VAESENCLAST Perform Last Round of an AES Encryption Flow AES AVX
AESIMC Perform the AES InvMixColumn Transformation AES
VAESIMC Perform the AES InvMixColumn Transformation AES AVX
AESKEYGENASSIST AES Round Key Generation Assist AES
VAESKEYGENASSIST AES Round Key Generation Assist AES AVX
AND Logical AND 8086 386 X64
ANDN Logical AND NOT BMI1
ANDNPD Bitwise Logical AND NOT of Packed Double Precision Floating-Point Values SSE2
VANDNPD Bitwise Logical AND NOT of Packed Double Precision Floating-Point Values AVX AVX512_VL AVX512_DQ
ANDNPS Bitwise Logical AND NOT of Packed Single Precision Floating-Point Values SSE
VANDNPS Bitwise Logical AND NOT of Packed Single Precision Floating-Point Values AVX AVX512_VL AVX512_DQ
ANDPD Bitwise Logical AND of Packed Double Precision Floating-Point Values SSE2
VANDPD Bitwise Logical AND of Packed Double Precision Floating-Point Values AVX AVX512_VL AVX512_DQ
ANDPS Bitwise Logical AND of Packed Single Precision Floating-Point Values SSE
VANDPS Bitwise Logical AND of Packed Single Precision Floating-Point Values AVX AVX512_VL AVX512_DQ
ARPL Adjust RPL Field of Segment Selector 8086
BEXTR Bit Field Extract BMI1
BLENDPD Blend Packed Double Precision Floating-Point Values SSE4_1
VBLENDPD Blend Packed Double Precision Floating-Point Values AVX
BLENDPS Blend Packed Single Precision Floating-Point Values SSE4_1
VBLENDPS Blend Packed Single Precision Floating-Point Values AVX
BLENDVPD Variable Blend Packed Double Precision Floating-Point Values SSE4_1
VBLENDVPD Variable Blend Packed Double Precision Floating-Point Values AVX
BLENDVPS Variable Blend Packed Single Precision Floating-Point Values SSE4_1
VBLENDVPS Variable Blend Packed Single Precision Floating-Point Values AVX
BLSI Extract Lowest Set Isolated Bit BMI1
BLSMSK Get Mask Up to Lowest Set Bit BMI1
BLSR Reset Lowest Set Bit BMI1
BNDCL Check Lower Bound MPX
BNDCU Check Upper Bound MPX
BNDCN Check Upper Bound MPX
BNDLDX Load Extended Bounds Using Address Translation MPX
BNDMK Make Bounds MPX
BNDMOV Move Bounds MPX
BNDSTX Store Extended Bounds Using Address Translation MPX
BOUND Check Array Index Against Bounds 8086 386
BSF Bit Scan Forward 8086 386 X64
BSR Bit Scan Reverse 8086 386 X64
BSWAP Byte Swap 386 X64
BT Bit Test 8086 386 X64
BTC Bit Test and Complement 8086 386 X64
BTR Bit Test and Reset 8086 386 X64
BTS Bit Test and Set 8086 386 X64
BZHI Zero High Bits Starting with Specified Bit Position BMI2
CALL Call Procedure 386 8086 X64
CBW Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword 8086
CWDE Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword 8086
CDQE Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword 8086
CLAC Clear AC Flag in EFLAGS Register
CLC Clear Carry Flag 8086
CLD Clear Direction Flag 8086
CLDEMOTE Cache Line Demote CLDEMOTE
CLFLUSH Flush Cache Line 8086
CLFLUSHOPT Flush Cache Line Optimized 8086
CLI Clear Interrupt Flag 8086
CLTS Clear Task-Switched Flag in CR0 8086
CLWB Cache Line Write Back
CMC Complement Carry Flag 8086
CMOVA Conditional Move P6 X64
CMOVAE Conditional Move P6 X64
CMOVB Conditional Move P6 X64
CMOVBE Conditional Move P6 X64
CMOVC Conditional Move P6 X64
CMOVE Conditional Move P6 X64
CMOVG Conditional Move P6 X64
CMOVGE Conditional Move P6 X64
CMOVL Conditional Move P6 X64
CMOVLE Conditional Move P6 X64
CMOVNA Conditional Move P6 X64
CMOVNAE Conditional Move P6 X64
CMOVNB Conditional Move P6 X64
CMOVNBE Conditional Move P6 X64
CMOVNC Conditional Move P6 X64
CMOVNE Conditional Move P6 X64
CMOVNG Conditional Move P6 X64
CMOVNGE Conditional Move P6 X64
CMOVNL Conditional Move P6 X64
CMOVNLE Conditional Move P6 X64
CMOVNO Conditional Move P6 X64
CMOVNP Conditional Move P6 X64
CMOVNS Conditional Move P6 X64
CMOVNZ Conditional Move P6 X64
CMOVO Conditional Move P6 X64
CMOVP Conditional Move P6 X64
CMOVPE Conditional Move P6 X64
CMOVPO Conditional Move P6 X64
CMOVS Conditional Move P6 X64
CMOVZ Conditional Move P6 X64
CMP Compare Two Operands 8086 386 X64
CMPPD Compare Packed Double-Precision Floating-Point Values SSE2
VCMPPD Compare Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
CMPPS Compare Packed Single-Precision Floating-Point Values SSE
VCMPPS Compare Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
CMPS Compare String Operands 8086 386 X64
CMPSB Compare String Operands 8086
CMPSW Compare String Operands 8086
CMPSD Compare String Operands 8086
CMPSQ Compare String Operands 8086
CMPSD Compare Scalar Double-Precision Floating-Point Value SSE2
VCMPSD Compare Scalar Double-Precision Floating-Point Value AVX AVX512_F
CMPSS Compare Scalar Single-Precision Floating-Point Value SSE
VCMPSS Compare Scalar Single-Precision Floating-Point Value AVX AVX512_F
CMPXCHG Compare and Exchange
CMPXCHG8B Compare and Exchange Bytes
CMPXCHG16B Compare and Exchange Bytes
COMISD Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS SSE2
VCOMISD Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS AVX AVX512_F
COMISS Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS SSE
VCOMISS Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS AVX AVX512_F
CPUID CPU Identification 8086
CRC32 Accumulate CRC32 Value
CVTDQ2PD Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values SSE2
VCVTDQ2PD Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
CVTDQ2PS Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values SSE2
VCVTDQ2PS Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
CVTPD2DQ Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers SSE2
VCVTPD2DQ Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers AVX AVX512_VL AVX512_F
CVTPD2PI Convert Packed Double-Precision FP Values to Packed Dword Integers
CVTPD2PS Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values SSE2
VCVTPD2PS Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
CVTPI2PD Convert Packed Dword Integers to Packed Double-Precision FP Values
CVTPI2PS Convert Packed Dword Integers to Packed Single-Precision FP Values
CVTPS2DQ Convert Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values SSE2
VCVTPS2DQ Convert Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values AVX AVX512_VL AVX512_F
CVTPS2PD Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values SSE2
VCVTPS2PD Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
CVTPS2PI Convert Packed Single-Precision FP Values to Packed Dword Integers
CVTSD2SI Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer SSE2
VCVTSD2SI Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer AVX AVX512_F
CVTSD2SS Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value SSE2
VCVTSD2SS Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value AVX AVX512_F
CVTSI2SD Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value SSE2
VCVTSI2SD Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value AVX AVX512_F
CVTSI2SS Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value SSE
VCVTSI2SS Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value AVX AVX512_F
CVTSS2SD Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value SSE2
VCVTSS2SD Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value AVX AVX512_F
CVTSS2SI Convert Scalar Single-Precision Floating-Point Value to Doubleword Integer SSE
VCVTSS2SI Convert Scalar Single-Precision Floating-Point Value to Doubleword Integer AVX AVX512_F
CVTTPD2DQ Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers SSE2
VCVTTPD2DQ Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers AVX AVX512_VL AVX512_F
CVTTPD2PI Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers
CVTTPS2DQ Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values SSE2
VCVTTPS2DQ Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values AVX AVX512_VL AVX512_F
CVTTPS2PI Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers
CVTTSD2SI Convert with Truncation Scalar Double-Precision Floating-Point Value to Signed Integer SSE2
VCVTTSD2SI Convert with Truncation Scalar Double-Precision Floating-Point Value to Signed Integer AVX AVX512_F
CVTTSS2SI Convert with Truncation Scalar Single-Precision Floating-Point Value to Integer SSE
VCVTTSS2SI Convert with Truncation Scalar Single-Precision Floating-Point Value to Integer AVX AVX512_F
CWD Convert Word to Doubleword/Convert Doubleword to Quadword 8086
CDQ Convert Word to Doubleword/Convert Doubleword to Quadword 8086
CQO Convert Word to Doubleword/Convert Doubleword to Quadword 8086
DAA Decimal Adjust AL after Addition 8086
DAS Decimal Adjust AL after Subtraction 8086
DEC Decrement by 1 8086 386 X64
DIV Unsigned Divide 8086 386 X64
DIVPD Divide Packed Double-Precision Floating-Point Values SSE2
VDIVPD Divide Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
DIVPS Divide Packed Single-Precision Floating-Point Values SSE
VDIVPS Divide Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
DIVSD Divide Scalar Double-Precision Floating-Point Value SSE2
VDIVSD Divide Scalar Double-Precision Floating-Point Value AVX AVX512_F
DIVSS Divide Scalar Single-Precision Floating-Point Values SSE
VDIVSS Divide Scalar Single-Precision Floating-Point Values AVX AVX512_F
DPPD Dot Product of Packed Double Precision Floating-Point Values SSE4_1
VDPPD Dot Product of Packed Double Precision Floating-Point Values AVX
DPPS Dot Product of Packed Single Precision Floating-Point Values SSE4_1
VDPPS Dot Product of Packed Single Precision Floating-Point Values AVX
EACCEPT Accept Changes to an EPC Page SGX2
EACCEPTCOPY Initialize a Pending Page SGX2
EADD Add a Page to an Uninitialized Enclave SGX1
EAUG Add a Page to an Initialized Enclave SGX2
EBLOCK Mark a page in EPC as Blocked SGX1
ECREATE Create an SECS page in the Enclave Page Cache SGX1
EDBGRD Read From a Debug Enclave SGX1
EDBGWR Write to a Debug Enclave SGX1
EDECVIRTCHILD Decrement VIRTCHILDCNT in SECS
EENTER Enters an Enclave SGX1
EEXIT Exits an Enclave SGX1
EEXTEND Extend Uninitialized Enclave Measurement by 256 Bytes SGX1
EGETKEY Retrieves a Cryptographic Key SGX1
EINCVIRTCHILD Increment VIRTCHILDCNT in SECS
EINIT Initialize an Enclave for Execution SGX1
ELDB Load an EPC Page and Mark its State SGX1
ELDU Load an EPC Page and Mark its State SGX1
ELDBC Load an EPC Page and Mark its State
EMMS Empty MMX Technology State 8086
EMODPE Extend an EPC Page Permissions SGX2
EMODPR Restrict the Permissions of an EPC Page SGX2
EMODT Change the Type of an EPC Page SGX2
ENCLS Execute an Enclave System Function of Specified Leaf Number
ENCLU Execute an Enclave User Function of Specified Leaf Number
ENCLV Execute an Enclave VMM Function of Specified Leaf Number
ENQCMD Enqueue Command ENQCMD
ENQCMDS Enqueue Command Supervisor ENQCMD
ENTER Make Stack Frame for Procedure Parameters 8086
EPA Add Version Array SGX1
ERDINFO Read Type and Status Information About an EPC Page
EREMOVE Remove a page from the EPC SGX1
EREPORT Create a Cryptographic Report of the Enclave SGX1
ERESUME Re-Enters an Enclave SGX1
ESETCONTEXT Set the ENCLAVECONTEXT Field in SECS
ETRACK Activates EBLOCK Checks SGX1
ETRACKC Activates EBLOCK Checks
EWB Invalidate an EPC Page and Write out to Main Memory SGX1
EXTRACTPS Extract Packed Floating-Point Values SSE4_1
VEXTRACTPS Extract Packed Floating-Point Values AVX AVX512_F
F2XM1 Compute 2x–1 8086
FABS Absolute Value 8086
FADD Add 386 X64 8086
FADDP Add 8086
FIADD Add 386 8086
FBLD Load Binary Coded Decimal 8086
FBSTP Store BCD Integer and Pop 8086
FCHS Change Sign 8086
FCLEX Clear Exceptions 8086
FNCLEX Clear Exceptions 8086
FCMOVB Floating-Point Conditional Move 8086
FCMOVE Floating-Point Conditional Move 8086
FCMOVBE Floating-Point Conditional Move 8086
FCMOVU Floating-Point Conditional Move 8086
FCMOVNB Floating-Point Conditional Move 8086
FCMOVNE Floating-Point Conditional Move 8086
FCMOVNBE Floating-Point Conditional Move 8086
FCMOVNU Floating-Point Conditional Move 8086
FCOM Compare Floating Point Values 386 X64 8086
FCOMP Compare Floating Point Values 386 X64 8086
FCOMPP Compare Floating Point Values 8086
FCOMI Compare Floating Point Values and Set EFLAGS 8086
FCOMIP Compare Floating Point Values and Set EFLAGS 8086
FUCOMI Compare Floating Point Values and Set EFLAGS 8086
FUCOMIP Compare Floating Point Values and Set EFLAGS 8086
FCOS Cosine 8086
FDECSTP Decrement Stack-Top Pointer 8086
FDIV Divide 386 X64 8086
FDIVP Divide 8086
FIDIV Divide 386 8086
FDIVR Reverse Divide 386 X64 8086
FDIVRP Reverse Divide 8086
FIDIVR Reverse Divide 386 8086
FFREE Free Floating-Point Register 8086
FICOM Compare Integer 8086 386
FICOMP Compare Integer 8086 386
FILD Load Integer 8086 386 X64
FINCSTP Increment Stack-Top Pointer 8086
FINIT Initialize Floating-Point Unit 8086
FNINIT Initialize Floating-Point Unit 8086
FIST Store Integer 8086 386
FISTP Store Integer 8086 386 X64
FISTTP Store Integer with Truncation 8086 386 X64
FLD Load Floating Point Value 386 X64 8086
FLD1 Load Constant 8086
FLDL2T Load Constant 8086
FLDL2E Load Constant 8086
FLDPI Load Constant 8086
FLDLG2 Load Constant 8086
FLDLN2 Load Constant 8086
FLDZ Load Constant 8086
FLDCW Load x87 FPU Control Word 8086
FLDENV Load x87 FPU Environment 8086
FMUL Multiply 386 X64 8086
FMULP Multiply 8086
FIMUL Multiply 386 8086
FNOP No Operation 8086
FPATAN Partial Arctangent 8086
FPREM Partial Remainder 8086
FPREM1 Partial Remainder 8086
FPTAN Partial Tangent 8086
FRNDINT Round to Integer 8086
FRSTOR Restore x87 FPU State 8086
FSAVE Store x87 FPU State 8086
FNSAVE Store x87 FPU State 8086
FSCALE Scale 8086
FSIN Sine 8086
FSINCOS Sine and Cosine 8086
FSQRT Square Root 8086
FST Store Floating Point Value 386 X64 8086
FSTP Store Floating Point Value 386 X64 8086
FSTCW Store x87 FPU Control Word 8086
FNSTCW Store x87 FPU Control Word 8086
FSTENV Store x87 FPU Environment 8086
FNSTENV Store x87 FPU Environment 8086
FSTSW Store x87 FPU Status Word 8086
FNSTSW Store x87 FPU Status Word 8086
FSUB Subtract 386 X64 8086
FSUBP Subtract 8086
FISUB Subtract 386 8086
FSUBR Reverse Subtract 386 X64 8086
FSUBRP Reverse Subtract 8086
FISUBR Reverse Subtract 386 8086
FTST TEST 8086
FUCOM Unordered Compare Floating Point Values 8086
FUCOMP Unordered Compare Floating Point Values 8086
FUCOMPP Unordered Compare Floating Point Values 8086
FXAM Examine Floating-Point 8086
FXCH Exchange Register Contents 8086
FXRSTOR Restore x87 FPU, MMX, XMM, and MXCSR State
FXRSTOR64 Restore x87 FPU, MMX, XMM, and MXCSR State
FXSAVE Save x87 FPU, MMX Technology, and SSE State
FXSAVE64 Save x87 FPU, MMX Technology, and SSE State
FXTRACT Extract Exponent and Significand 8086
FYL2X Compute y ∗ log2x 8086
FYL2XP1 Compute y ∗ log2(x +1) 8086
EXITAC Exit Authenticated Code Execution Mode SMX
PARAMETERS Report the SMX Parameters SMX
SENTER Enter a Measured Environment SMX
SEXIT Exit Measured Environment SMX
SMCTRL SMX Mode Control SMX
WAKEUP Wake up sleeping processors in measured environment SMX
GF2P8AFFINEINVQB Galois Field Affine Transformation Inverse AVX512_GFNI
VGF2P8AFFINEINVQB Galois Field Affine Transformation Inverse AVX AVX512_GFNI AVX512_VL AVX512_F
GF2P8AFFINEQB Galois Field Affine Transformation AVX512_GFNI
VGF2P8AFFINEQB Galois Field Affine Transformation AVX AVX512_GFNI AVX512_VL AVX512_F
GF2P8MULB Galois Field Multiply Bytes AVX512_GFNI
VGF2P8MULB Galois Field Multiply Bytes AVX AVX512_GFNI AVX512_VL AVX512_F
HADDPD Packed Double-FP Horizontal Add SSE3
VHADDPD Packed Double-FP Horizontal Add AVX
HADDPS Packed Single-FP Horizontal Add SSE3
VHADDPS Packed Single-FP Horizontal Add AVX
HLT Halt 8086
HSUBPD Packed Double-FP Horizontal Subtract SSE3
VHSUBPD Packed Double-FP Horizontal Subtract AVX
HSUBPS Packed Single-FP Horizontal Subtract SSE3
VHSUBPS Packed Single-FP Horizontal Subtract AVX
IDIV Signed Divide 8086 386 X64
IMUL Signed Multiply 8086 386 X64
IN Input from Port 8086
INC Increment by 1 8086 386 X64
INS Input from Port to String 8086 386
INSB Input from Port to String 8086
INSW Input from Port to String 8086
INSD Input from Port to String 8086
INSERTPS Insert Scalar Single-Precision Floating-Point Value SSE4_1
VINSERTPS Insert Scalar Single-Precision Floating-Point Value AVX AVX512_F
INT3 Call to Interrupt Procedure 8086
INT Call to Interrupt Procedure 8086
INTO Call to Interrupt Procedure 8086
INT1 Call to Interrupt Procedure 8086
INVD Invalidate Internal Caches 8086
INVLPG Invalidate TLB Entries 8086
INVPCID Invalidate Process-Context Identifier INVPCID
IRET Interrupt Return 8086
IRETD Interrupt Return 8086
IRETQ Interrupt Return 8086
JA Jump if Condition Is Met 8086 386
JAE Jump if Condition Is Met 8086 386
JB Jump if Condition Is Met 8086 386
JBE Jump if Condition Is Met 8086 386
JC Jump if Condition Is Met 8086 386
JCXZ Jump if Condition Is Met 8086
JECXZ Jump if Condition Is Met 386
JRCXZ Jump if Condition Is Met X64
JE Jump if Condition Is Met 8086 386
JG Jump if Condition Is Met 8086 386
JGE Jump if Condition Is Met 8086 386
JL Jump if Condition Is Met 8086 386
JLE Jump if Condition Is Met 8086 386
JNA Jump if Condition Is Met 8086 386
JNAE Jump if Condition Is Met 8086 386
JNB Jump if Condition Is Met 8086 386
JNBE Jump if Condition Is Met 8086 386
JNC Jump if Condition Is Met 8086 386
JNE Jump if Condition Is Met 8086 386
JNG Jump if Condition Is Met 8086 386
JNGE Jump if Condition Is Met 8086 386
JNL Jump if Condition Is Met 8086 386
JNLE Jump if Condition Is Met 8086 386
JNO Jump if Condition Is Met 8086 386
JNP Jump if Condition Is Met 8086 386
JNS Jump if Condition Is Met 8086 386
JNZ Jump if Condition Is Met 8086 386
JO Jump if Condition Is Met 8086 386
JP Jump if Condition Is Met 8086 386
JPE Jump if Condition Is Met 8086 386
JPO Jump if Condition Is Met 8086 386
JS Jump if Condition Is Met 8086 386
JZ Jump if Condition Is Met 8086 386
JMP Jump 8086 386 X64
KADDW ADD Two Masks AVX512_DQ
KADDB ADD Two Masks AVX512_DQ
KADDQ ADD Two Masks AVX512_BW
KADDD ADD Two Masks AVX512_BW
KANDNW Bitwise Logical AND NOT Masks AVX512_F
KANDNB Bitwise Logical AND NOT Masks AVX512_DQ
KANDNQ Bitwise Logical AND NOT Masks AVX512_BW
KANDND Bitwise Logical AND NOT Masks AVX512_BW
KANDW Bitwise Logical AND Masks AVX512_F
KANDB Bitwise Logical AND Masks AVX512_DQ
KANDQ Bitwise Logical AND Masks AVX512_BW
KANDD Bitwise Logical AND Masks AVX512_BW
KMOVW Move from and to Mask Registers AVX512_F
KMOVB Move from and to Mask Registers AVX512_DQ
KMOVQ Move from and to Mask Registers AVX512_BW
KMOVD Move from and to Mask Registers AVX512_BW
KNOTW NOT Mask Register AVX512_F
KNOTB NOT Mask Register AVX512_DQ
KNOTQ NOT Mask Register AVX512_BW
KNOTD NOT Mask Register AVX512_BW
KORTESTW OR Masks And Set Flags AVX512_F
KORTESTB OR Masks And Set Flags AVX512_DQ
KORTESTQ OR Masks And Set Flags AVX512_BW
KORTESTD OR Masks And Set Flags AVX512_BW
KORW Bitwise Logical OR Masks AVX512_F
KORB Bitwise Logical OR Masks AVX512_DQ
KORQ Bitwise Logical OR Masks AVX512_BW
KORD Bitwise Logical OR Masks AVX512_BW
KSHIFTLW Shift Left Mask Registers AVX512_F
KSHIFTLB Shift Left Mask Registers AVX512_DQ
KSHIFTLQ Shift Left Mask Registers AVX512_BW
KSHIFTLD Shift Left Mask Registers AVX512_BW
KSHIFTRW Shift Right Mask Registers AVX512_F
KSHIFTRB Shift Right Mask Registers AVX512_DQ
KSHIFTRQ Shift Right Mask Registers AVX512_BW
KSHIFTRD Shift Right Mask Registers AVX512_BW
KTESTW Packed Bit Test Masks and Set Flags AVX512_DQ
KTESTB Packed Bit Test Masks and Set Flags AVX512_DQ
KTESTQ Packed Bit Test Masks and Set Flags AVX512_BW
KTESTD Packed Bit Test Masks and Set Flags AVX512_BW
KUNPCKBW Unpack for Mask Registers AVX512_F
KUNPCKWD Unpack for Mask Registers AVX512_BW
KUNPCKDQ Unpack for Mask Registers AVX512_BW
KXNORW Bitwise Logical XNOR Masks AVX512_F
KXNORB Bitwise Logical XNOR Masks AVX512_DQ
KXNORQ Bitwise Logical XNOR Masks AVX512_BW
KXNORD Bitwise Logical XNOR Masks AVX512_BW
KXORW Bitwise Logical XOR Masks AVX512_F
KXORB Bitwise Logical XOR Masks AVX512_DQ
KXORQ Bitwise Logical XOR Masks AVX512_BW
KXORD Bitwise Logical XOR Masks AVX512_BW
LAHF Load Status Flags into AH Register 8086
LAR Load Access Rights Byte 8086 386
LDDQU Load Unaligned Integer 128 Bits SSE3
VLDDQU Load Unaligned Integer 128 Bits AVX
LDMXCSR Load MXCSR Register SSE
VLDMXCSR Load MXCSR Register AVX
LDS Load Far Pointer 8086 386
LSS Load Far Pointer 8086 386 X64
LES Load Far Pointer 8086 386
LFS Load Far Pointer 8086 386 X64
LGS Load Far Pointer 8086 386 X64
LEA Load Effective Address 8086 386 X64
LEAVE High Level Procedure Exit 8086
LFENCE Load Fence 8086
LGDT Load Global/Interrupt Descriptor Table Register 8086
LIDT Load Global/Interrupt Descriptor Table Register 8086
LLDT Load Local Descriptor Table Register 8086
LMSW Load Machine Status Word 8086
LOCK Assert LOCK# Signal Prefix 8086
LODS Load String 8086 386 X64
LODSB Load String 8086
LODSW Load String 8086
LODSD Load String 8086
LODSQ Load String 8086
LOOP Loop According to ECX Counter 8086
LOOPE Loop According to ECX Counter 8086
LOOPNE Loop According to ECX Counter 8086
LSL Load Segment Limit 8086 386 X64
LTR Load Task Register 8086
LZCNT Count the Number of Leading Zero Bits LZCNT
MASKMOVDQU Store Selected Bytes of Double Quadword SSE2
VMASKMOVDQU Store Selected Bytes of Double Quadword AVX
MASKMOVQ Store Selected Bytes of Quadword
MAXPD Maximum of Packed Double-Precision Floating-Point Values SSE2
VMAXPD Maximum of Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
MAXPS Maximum of Packed Single-Precision Floating-Point Values SSE
VMAXPS Maximum of Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
MAXSD Return Maximum Scalar Double-Precision Floating-Point Value SSE2
VMAXSD Return Maximum Scalar Double-Precision Floating-Point Value AVX AVX512_F
MAXSS Return Maximum Scalar Single-Precision Floating-Point Value SSE
VMAXSS Return Maximum Scalar Single-Precision Floating-Point Value AVX AVX512_F
MFENCE Memory Fence 8086
MINPD Minimum of Packed Double-Precision Floating-Point Values SSE2
VMINPD Minimum of Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
MINPS Minimum of Packed Single-Precision Floating-Point Values SSE
VMINPS Minimum of Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
MINSD Return Minimum Scalar Double-Precision Floating-Point Value SSE2
VMINSD Return Minimum Scalar Double-Precision Floating-Point Value AVX AVX512_F
MINSS Return Minimum Scalar Single-Precision Floating-Point Value SSE
VMINSS Return Minimum Scalar Single-Precision Floating-Point Value AVX AVX512_F
MONITOR Set Up Monitor Address 8086
MOV Move 8086 386 X64
MOVAPD Move Aligned Packed Double-Precision Floating-Point Values SSE2
VMOVAPD Move Aligned Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
MOVAPS Move Aligned Packed Single-Precision Floating-Point Values SSE
VMOVAPS Move Aligned Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
MOVBE Move Data After Swapping Bytes 8086 386 X64
MOVD Move Doubleword/Move Quadword MMX SSE2
MOVQ Move Doubleword/Move Quadword MMX SSE2
VMOVD Move Doubleword/Move Quadword AVX AVX512_F
VMOVQ Move Doubleword/Move Quadword AVX AVX512_F
MOVDDUP Replicate Double FP Values SSE3
VMOVDDUP Replicate Double FP Values AVX AVX512_VL AVX512_F
MOVDIR64B Move 64 Bytes as Direct Store MOVDIR64B
MOVDIRI Move Doubleword as Direct Store MOVDIRI
MOVDQ2Q Move Quadword from XMM to MMX Technology Register SSE
MOVDQA Move Aligned Packed Integer Values SSE2
VMOVDQA Move Aligned Packed Integer Values AVX
VMOVDQA32 Move Aligned Packed Integer Values AVX512_VL AVX512_F
VMOVDQA64 Move Aligned Packed Integer Values AVX512_VL AVX512_F
MOVDQU Move Unaligned Packed Integer Values SSE2
VMOVDQU Move Unaligned Packed Integer Values AVX
VMOVDQU8 Move Unaligned Packed Integer Values AVX512_VL AVX512_BW
VMOVDQU16 Move Unaligned Packed Integer Values AVX512_VL AVX512_BW
VMOVDQU32 Move Unaligned Packed Integer Values AVX512_VL AVX512_F
VMOVDQU64 Move Unaligned Packed Integer Values AVX512_VL AVX512_F
MOVHLPS Move Packed Single-Precision Floating-Point Values High to Low SSE
VMOVHLPS Move Packed Single-Precision Floating-Point Values High to Low AVX AVX512_F
MOVHPD Move High Packed Double-Precision Floating-Point Value SSE2
VMOVHPD Move High Packed Double-Precision Floating-Point Value AVX AVX512_F
MOVHPS Move High Packed Single-Precision Floating-Point Values SSE
VMOVHPS Move High Packed Single-Precision Floating-Point Values AVX AVX512_F
MOVLHPS Move Packed Single-Precision Floating-Point Values Low to High SSE
VMOVLHPS Move Packed Single-Precision Floating-Point Values Low to High AVX AVX512_F
MOVLPD Move Low Packed Double-Precision Floating-Point Value SSE2
VMOVLPD Move Low Packed Double-Precision Floating-Point Value AVX AVX512_F
MOVLPS Move Low Packed Single-Precision Floating-Point Values SSE
VMOVLPS Move Low Packed Single-Precision Floating-Point Values AVX AVX512_F
MOVMSKPD Extract Packed Double-Precision Floating-Point Sign Mask SSE2
VMOVMSKPD Extract Packed Double-Precision Floating-Point Sign Mask AVX
MOVMSKPS Extract Packed Single-Precision Floating-Point Sign Mask SSE
VMOVMSKPS Extract Packed Single-Precision Floating-Point Sign Mask AVX
MOVNTDQ Store Packed Integers Using Non-Temporal Hint SSE2
VMOVNTDQ Store Packed Integers Using Non-Temporal Hint AVX AVX512_VL AVX512_F
MOVNTDQA Load Double Quadword Non-Temporal Aligned Hint SSE4_1
VMOVNTDQA Load Double Quadword Non-Temporal Aligned Hint AVX AVX2 AVX512_VL AVX512_F
MOVNTI Store Doubleword Using Non-Temporal Hint 386 X64
MOVNTPD Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint SSE2
VMOVNTPD Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint AVX AVX512_VL AVX512_F
MOVNTPS Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint SSE
VMOVNTPS Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint AVX AVX512_VL AVX512_F
MOVNTQ Store of Quadword Using Non-Temporal Hint X64
MOVQ Move Quadword MMX SSE2
VMOVQ Move Quadword AVX AVX512_F
MOVQ2DQ Move Quadword from MMX Technology to XMM Register 8086
MOVS Move Data from String to String 8086 386 X64
MOVSB Move Data from String to String 8086
MOVSW Move Data from String to String 8086
MOVSD Move Data from String to String 8086
MOVSQ Move Data from String to String 8086
MOVSD Move or Merge Scalar Double-Precision Floating-Point Value SSE2
VMOVSD Move or Merge Scalar Double-Precision Floating-Point Value AVX AVX512_F
MOVSHDUP Replicate Single FP Values SSE3
VMOVSHDUP Replicate Single FP Values AVX AVX512_VL AVX512_F
MOVSLDUP Replicate Single FP Values SSE3
VMOVSLDUP Replicate Single FP Values AVX AVX512_VL AVX512_F
MOVSS Move or Merge Scalar Single-Precision Floating-Point Value SSE
VMOVSS Move or Merge Scalar Single-Precision Floating-Point Value AVX AVX512_F
MOVSX Move with Sign-Extension 8086 386 X64
MOVSXD Move with Sign-Extension 8086 386 X64
MOVUPD Move Unaligned Packed Double-Precision Floating-Point Values SSE2
VMOVUPD Move Unaligned Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
MOVUPS Move Unaligned Packed Single-Precision Floating-Point Values SSE
VMOVUPS Move Unaligned Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
MOVZX Move with Zero-Extend 8086 386 X64
MPSADBW Compute Multiple Packed Sums of Absolute Difference SSE4_1
VMPSADBW Compute Multiple Packed Sums of Absolute Difference AVX AVX2
MUL Unsigned Multiply 8086 386 X64
MULPD Multiply Packed Double-Precision Floating-Point Values SSE2
VMULPD Multiply Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
MULPS Multiply Packed Single-Precision Floating-Point Values SSE
VMULPS Multiply Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
MULSD Multiply Scalar Double-Precision Floating-Point Value SSE2
VMULSD Multiply Scalar Double-Precision Floating-Point Value AVX AVX512_F
MULSS Multiply Scalar Single-Precision Floating-Point Values SSE
VMULSS Multiply Scalar Single-Precision Floating-Point Values AVX AVX512_F
MULX Unsigned Multiply Without Affecting Flags BMI2
MWAIT Monitor Wait 8086
NEG Two's Complement Negation 8086 386 X64
NOP No Operation 8086 386
NOT One's Complement Negation 8086 386 X64
OR Logical Inclusive OR 8086 386 X64
ORPD Bitwise Logical OR of Packed Double Precision Floating-Point Values SSE2
VORPD Bitwise Logical OR of Packed Double Precision Floating-Point Values AVX AVX512_VL AVX512_DQ
ORPS Bitwise Logical OR of Packed Single Precision Floating-Point Values SSE
VORPS Bitwise Logical OR of Packed Single Precision Floating-Point Values AVX AVX512_VL AVX512_DQ
OUT Output to Port 8086
OUTS Output String to Port 8086 386
OUTSB Output String to Port 8086
OUTSW Output String to Port 8086
OUTSD Output String to Port 8086
PABSB Packed Absolute Value SSSE3
PABSW Packed Absolute Value SSSE3
PABSD Packed Absolute Value SSSE3
VPABSB Packed Absolute Value AVX AVX2 AVX512_VL AVX512_BW
VPABSW Packed Absolute Value AVX AVX2 AVX512_VL AVX512_BW
VPABSD Packed Absolute Value AVX AVX2 AVX512_VL AVX512_F
VPABSQ Packed Absolute Value AVX512_VL AVX512_F
PACKSSWB Pack with Signed Saturation MMX SSE2
PACKSSDW Pack with Signed Saturation MMX SSE2
VPACKSSWB Pack with Signed Saturation AVX AVX2 AVX512_VL AVX512_BW
VPACKSSDW Pack with Signed Saturation AVX AVX2 AVX512_VL AVX512_BW
PACKUSDW Pack with Unsigned Saturation SSE4_1
VPACKUSDW Pack with Unsigned Saturation AVX AVX2 AVX512_VL AVX512_BW
PACKUSWB Pack with Unsigned Saturation MMX SSE2
VPACKUSWB Pack with Unsigned Saturation AVX AVX2 AVX512_VL AVX512_BW
PADDB Add Packed Integers MMX SSE2
PADDW Add Packed Integers MMX SSE2
PADDD Add Packed Integers MMX SSE2
PADDQ Add Packed Integers MMX SSE2
VPADDB Add Packed Integers AVX AVX2 AVX512_VL AVX512_BW
VPADDW Add Packed Integers AVX AVX2 AVX512_VL AVX512_BW
VPADDD Add Packed Integers AVX AVX2 AVX512_VL AVX512_F
VPADDQ Add Packed Integers AVX AVX2 AVX512_VL AVX512_F
PADDSB Add Packed Signed Integers with Signed Saturation MMX SSE2
PADDSW Add Packed Signed Integers with Signed Saturation MMX SSE2
VPADDSB Add Packed Signed Integers with Signed Saturation AVX AVX2 AVX512_VL AVX512_BW
VPADDSW Add Packed Signed Integers with Signed Saturation AVX AVX2 AVX512_VL AVX512_BW
PADDUSB Add Packed Unsigned Integers with Unsigned Saturation MMX SSE2
PADDUSW Add Packed Unsigned Integers with Unsigned Saturation MMX SSE2
VPADDUSB Add Packed Unsigned Integers with Unsigned Saturation AVX AVX2 AVX512_VL AVX512_BW
VPADDUSW Add Packed Unsigned Integers with Unsigned Saturation AVX AVX2 AVX512_VL AVX512_BW
PALIGNR Packed Align Right SSSE3
VPALIGNR Packed Align Right AVX AVX2 AVX512_VL AVX512_BW
PAND Logical AND MMX SSE2
VPAND Logical AND AVX AVX2
VPANDD Logical AND AVX512_VL AVX512_F
VPANDQ Logical AND AVX512_VL AVX512_F
PANDN Logical AND NOT MMX SSE2
VPANDN Logical AND NOT AVX AVX2
VPANDND Logical AND NOT AVX512_VL AVX512_F
VPANDNQ Logical AND NOT AVX512_VL AVX512_F
PAUSE Spin Loop Hint 8086
PAVGB Average Packed Integers SSE SSE2
PAVGW Average Packed Integers SSE SSE2
VPAVGB Average Packed Integers AVX AVX2 AVX512_VL AVX512_BW
VPAVGW Average Packed Integers AVX AVX2 AVX512_VL AVX512_BW
PBLENDVB Variable Blend Packed Bytes SSE4_1
VPBLENDVB Variable Blend Packed Bytes AVX AVX2
PBLENDW Blend Packed Words SSE4_1
VPBLENDW Blend Packed Words AVX AVX2
PCLMULQDQ Carry-Less Multiplication Quadword PCLMULQDQ
VPCLMULQDQ Carry-Less Multiplication Quadword PCLMULQDQ AVX
PCMPEQB Compare Packed Data for Equal MMX SSE2
PCMPEQW Compare Packed Data for Equal MMX SSE2
PCMPEQD Compare Packed Data for Equal MMX SSE2
VPCMPEQB Compare Packed Data for Equal AVX AVX2 AVX512_VL AVX512_BW
VPCMPEQW Compare Packed Data for Equal AVX AVX2 AVX512_VL AVX512_BW
VPCMPEQD Compare Packed Data for Equal AVX AVX2 AVX512_VL AVX512_F
PCMPEQQ Compare Packed Qword Data for Equal SSE4_1
VPCMPEQQ Compare Packed Qword Data for Equal AVX AVX2 AVX512_VL AVX512_F
PCMPESTRI Packed Compare Explicit Length Strings, Return Index SSE4_2
VPCMPESTRI Packed Compare Explicit Length Strings, Return Index AVX
PCMPESTRM Packed Compare Explicit Length Strings, Return Mask SSE4_2
VPCMPESTRM Packed Compare Explicit Length Strings, Return Mask AVX
PCMPGTB Compare Packed Signed Integers for Greater Than MMX SSE2
PCMPGTW Compare Packed Signed Integers for Greater Than MMX SSE2
PCMPGTD Compare Packed Signed Integers for Greater Than MMX SSE2
VPCMPGTB Compare Packed Signed Integers for Greater Than AVX AVX2 AVX512_VL AVX512_BW
VPCMPGTW Compare Packed Signed Integers for Greater Than AVX AVX2 AVX512_VL AVX512_BW
VPCMPGTD Compare Packed Signed Integers for Greater Than AVX AVX2 AVX512_VL AVX512_F
PCMPGTQ Compare Packed Data for Greater Than SSE4_2
VPCMPGTQ Compare Packed Data for Greater Than AVX AVX2 AVX512_VL AVX512_F
PCMPISTRI Packed Compare Implicit Length Strings, Return Index SSE4_2
VPCMPISTRI Packed Compare Implicit Length Strings, Return Index AVX
PCMPISTRM Packed Compare Implicit Length Strings, Return Mask SSE4_2
VPCMPISTRM Packed Compare Implicit Length Strings, Return Mask AVX
PCONFIG Platform Configuration PCONFIG
PDEP Parallel Bits Deposit BMI2
PEXT Parallel Bits Extract BMI2
PEXTRB Extract Byte/Dword/Qword SSE4_1
PEXTRD Extract Byte/Dword/Qword SSE4_1
PEXTRQ Extract Byte/Dword/Qword SSE4_1
VPEXTRB Extract Byte/Dword/Qword AVX AVX512_BW
VPEXTRD Extract Byte/Dword/Qword AVX AVX512_DQ
VPEXTRQ Extract Byte/Dword/Qword AVX AVX512_DQ
PEXTRW Extract Word SSE SSE2 SSE4_1
VPEXTRW Extract Word AVX AVX512_BW
PHADDSW Packed Horizontal Add and Saturate SSSE3
VPHADDSW Packed Horizontal Add and Saturate AVX AVX2
PHADDW Packed Horizontal Add SSSE3
PHADDD Packed Horizontal Add SSSE3
VPHADDW Packed Horizontal Add AVX AVX2
VPHADDD Packed Horizontal Add AVX AVX2
PHMINPOSUW Packed Horizontal Word Minimum SSE4_1
VPHMINPOSUW Packed Horizontal Word Minimum AVX
PHSUBSW Packed Horizontal Subtract and Saturate SSSE3
VPHSUBSW Packed Horizontal Subtract and Saturate AVX AVX2
PHSUBW Packed Horizontal Subtract SSSE3
PHSUBD Packed Horizontal Subtract SSSE3
VPHSUBW Packed Horizontal Subtract AVX AVX2
VPHSUBD Packed Horizontal Subtract AVX AVX2
PINSRB Insert Byte/Dword/Qword SSE4_1
PINSRD Insert Byte/Dword/Qword SSE4_1
PINSRQ Insert Byte/Dword/Qword SSE4_1
VPINSRB Insert Byte/Dword/Qword AVX AVX512_BW
VPINSRD Insert Byte/Dword/Qword AVX AVX512_DQ
VPINSRQ Insert Byte/Dword/Qword AVX AVX512_DQ
PINSRW Insert Word SSE SSE2
VPINSRW Insert Word AVX AVX512_BW
PMADDUBSW Multiply and Add Packed Signed and Unsigned Bytes SSSE3
VPMADDUBSW Multiply and Add Packed Signed and Unsigned Bytes AVX AVX2 AVX512_VL AVX512_BW
PMADDWD Multiply and Add Packed Integers MMX SSE2
VPMADDWD Multiply and Add Packed Integers AVX AVX2 AVX512_VL AVX512_BW
PMAXSW Maximum of Packed Signed Integers SSE SSE2
PMAXSB Maximum of Packed Signed Integers SSE4_1
PMAXSD Maximum of Packed Signed Integers SSE4_1
VPMAXSB Maximum of Packed Signed Integers AVX AVX2 AVX512_VL AVX512_BW
VPMAXSW Maximum of Packed Signed Integers AVX AVX2 AVX512_VL AVX512_BW
VPMAXSD Maximum of Packed Signed Integers AVX AVX2 AVX512_VL AVX512_F
VPMAXSQ Maximum of Packed Signed Integers AVX512_VL AVX512_F
PMAXUB Maximum of Packed Unsigned Integers SSE SSE2
PMAXUW Maximum of Packed Unsigned Integers SSE4_1
VPMAXUB Maximum of Packed Unsigned Integers AVX AVX2 AVX512_VL AVX512_BW
VPMAXUW Maximum of Packed Unsigned Integers AVX AVX2 AVX512_VL AVX512_BW
PMAXUD Maximum of Packed Unsigned Integers SSE4_1
VPMAXUD Maximum of Packed Unsigned Integers AVX AVX2 AVX512_VL AVX512_F
VPMAXUQ Maximum of Packed Unsigned Integers AVX512_VL AVX512_F
PMINSW Minimum of Packed Signed Integers SSE SSE2
PMINSB Minimum of Packed Signed Integers SSE4_1
VPMINSB Minimum of Packed Signed Integers AVX AVX2 AVX512_VL AVX512_BW
VPMINSW Minimum of Packed Signed Integers AVX AVX2 AVX512_VL AVX512_BW
PMINSD Minimum of Packed Signed Integers SSE4_1
VPMINSD Minimum of Packed Signed Integers AVX AVX2 AVX512_VL AVX512_F
VPMINSQ Minimum of Packed Signed Integers AVX512_VL AVX512_F
PMINUB Minimum of Packed Unsigned Integers SSE SSE2
PMINUW Minimum of Packed Unsigned Integers SSE4_1
VPMINUB Minimum of Packed Unsigned Integers AVX AVX2 AVX512_VL AVX512_BW
VPMINUW Minimum of Packed Unsigned Integers AVX AVX2 AVX512_VL AVX512_BW
PMINUD Minimum of Packed Unsigned Integers SSE4_1
VPMINUD Minimum of Packed Unsigned Integers AVX AVX2 AVX512_VL AVX512_F
VPMINUQ Minimum of Packed Unsigned Integers AVX512_VL AVX512_F
PMOVMSKB Move Byte Mask SSE SSE2
VPMOVMSKB Move Byte Mask AVX AVX2
PMOVSXBW Packed Move with Sign Extend SSE4_1
PMOVSXBD Packed Move with Sign Extend SSE4_1
PMOVSXBQ Packed Move with Sign Extend SSE4_1
PMOVSXWD Packed Move with Sign Extend SSE4_1
PMOVSXWQ Packed Move with Sign Extend SSE4_1
PMOVSXDQ Packed Move with Sign Extend SSE4_1
VPMOVSXBW Packed Move with Sign Extend AVX AVX2 AVX512_VL AVX512_BW
VPMOVSXBD Packed Move with Sign Extend AVX AVX2 AVX512_VL AVX512_F
VPMOVSXBQ Packed Move with Sign Extend AVX AVX2 AVX512_VL AVX512_F
VPMOVSXWD Packed Move with Sign Extend AVX AVX2 AVX512_VL AVX512_F
VPMOVSXWQ Packed Move with Sign Extend AVX AVX2 AVX512_VL AVX512_F
VPMOVSXDQ Packed Move with Sign Extend AVX AVX2 AVX512_VL AVX512_F
PMOVZXBW Packed Move with Zero Extend SSE4_1
PMOVZXBD Packed Move with Zero Extend SSE4_1
PMOVZXBQ Packed Move with Zero Extend SSE4_1
PMOVZXWD Packed Move with Zero Extend SSE4_1
PMOVZXWQ Packed Move with Zero Extend SSE4_1
PMOVZXDQ Packed Move with Zero Extend SSE4_1
VPMOVZXBW Packed Move with Zero Extend AVX AVX2 AVX512_VL AVX512_BW
VPMOVZXBD Packed Move with Zero Extend AVX AVX2 AVX512_VL AVX512_F
VPMOVZXBQ Packed Move with Zero Extend AVX AVX2 AVX512_VL AVX512_F
VPMOVZXWD Packed Move with Zero Extend AVX AVX2 AVX512_VL AVX512_F
VPMOVZXWQ Packed Move with Zero Extend AVX AVX2 AVX512_VL AVX512_F
VPMOVZXDQ Packed Move with Zero Extend AVX AVX2 AVX512_VL AVX512_F
PMULDQ Multiply Packed Doubleword Integers SSE4_1
VPMULDQ Multiply Packed Doubleword Integers AVX AVX2 AVX512_VL AVX512_F
PMULHRSW Packed Multiply High with Round and Scale SSSE3
VPMULHRSW Packed Multiply High with Round and Scale AVX AVX2 AVX512_VL AVX512_BW
PMULHUW Multiply Packed Unsigned Integers and Store High Result SSE SSE2
VPMULHUW Multiply Packed Unsigned Integers and Store High Result AVX AVX2 AVX512_VL AVX512_BW
PMULHW Multiply Packed Signed Integers and Store High Result MMX SSE2
VPMULHW Multiply Packed Signed Integers and Store High Result AVX AVX2 AVX512_VL AVX512_BW
PMULLD Multiply Packed Integers and Store Low Result SSE4_1
VPMULLD Multiply Packed Integers and Store Low Result AVX AVX2 AVX512_VL AVX512_F
VPMULLQ Multiply Packed Integers and Store Low Result AVX512_VL AVX512_DQ
PMULLW Multiply Packed Signed Integers and Store Low Result MMX SSE2
VPMULLW Multiply Packed Signed Integers and Store Low Result AVX AVX2 AVX512_VL AVX512_BW
PMULUDQ Multiply Packed Unsigned Doubleword Integers SSE2
VPMULUDQ Multiply Packed Unsigned Doubleword Integers AVX AVX2 AVX512_VL AVX512_F
POP Pop a Value from the Stack 8086 386 X64
POPA Pop All General-Purpose Registers 8086
POPAD Pop All General-Purpose Registers 8086
POPCNT Return the Count of Number of Bits Set to 1 8086 386 X64
POPF Pop Stack into EFLAGS Register 8086
POPFD Pop Stack into EFLAGS Register 8086
POPFQ Pop Stack into EFLAGS Register 8086
POR Bitwise Logical OR MMX SSE2
VPOR Bitwise Logical OR AVX AVX2
VPORD Bitwise Logical OR AVX512_VL AVX512_F
VPORQ Bitwise Logical OR AVX512_VL AVX512_F
PREFETCHT0 Prefetch Data Into Caches 8086
PREFETCHT1 Prefetch Data Into Caches 8086
PREFETCHT2 Prefetch Data Into Caches 8086
PREFETCHNTA Prefetch Data Into Caches 8086
PREFETCHW Prefetch Data into Caches in Anticipation of a Write PRFCHW
PREFETCHWT1 Prefetch Vector Data Into Caches with Intent to Write and T1 Hint PREFETCHWT1
PSADBW Compute Sum of Absolute Differences SSE SSE2
VPSADBW Compute Sum of Absolute Differences AVX AVX2 AVX512_VL AVX512_BW
PSHUFB Packed Shuffle Bytes SSSE3
VPSHUFB Packed Shuffle Bytes AVX AVX2 AVX512_VL AVX512_BW
PSHUFD Shuffle Packed Doublewords SSE2
VPSHUFD Shuffle Packed Doublewords AVX AVX2 AVX512_VL AVX512_F
PSHUFHW Shuffle Packed High Words SSE2
VPSHUFHW Shuffle Packed High Words AVX AVX2 AVX512_VL AVX512_BW
PSHUFLW Shuffle Packed Low Words SSE2
VPSHUFLW Shuffle Packed Low Words AVX AVX2 AVX512_VL AVX512_BW
PSHUFW Shuffle Packed Words
PSIGNB Packed SIGN SSSE3
PSIGNW Packed SIGN SSSE3
PSIGND Packed SIGN SSSE3
VPSIGNB Packed SIGN AVX AVX2
VPSIGNW Packed SIGN AVX AVX2
VPSIGND Packed SIGN AVX AVX2
PSLLDQ Shift Double Quadword Left Logical SSE2
VPSLLDQ Shift Double Quadword Left Logical AVX AVX2 AVX512_VL AVX512_BW
PSLLW Shift Packed Data Left Logical MMX SSE2
PSLLD Shift Packed Data Left Logical MMX SSE2
PSLLQ Shift Packed Data Left Logical MMX SSE2
VPSLLW Shift Packed Data Left Logical AVX AVX2 AVX512_VL AVX512_BW
VPSLLD Shift Packed Data Left Logical AVX AVX2 AVX512_VL AVX512_F
VPSLLQ Shift Packed Data Left Logical AVX AVX2 AVX512_VL AVX512_F
PSRAW Shift Packed Data Right Arithmetic MMX SSE2
PSRAD Shift Packed Data Right Arithmetic MMX SSE2
VPSRAW Shift Packed Data Right Arithmetic AVX AVX2 AVX512_VL AVX512_BW
VPSRAD Shift Packed Data Right Arithmetic AVX AVX2 AVX512_VL AVX512_F
VPSRAQ Shift Packed Data Right Arithmetic AVX512_VL AVX512_F
PSRLDQ Shift Double Quadword Right Logical SSE2
VPSRLDQ Shift Double Quadword Right Logical AVX AVX2 AVX512_VL AVX512_BW
PSRLW Shift Packed Data Right Logical MMX SSE2
PSRLD Shift Packed Data Right Logical MMX SSE2
PSRLQ Shift Packed Data Right Logical MMX SSE2
VPSRLW Shift Packed Data Right Logical AVX AVX2 AVX512_VL AVX512_BW
VPSRLD Shift Packed Data Right Logical AVX AVX2 AVX512_VL AVX512_F
VPSRLQ Shift Packed Data Right Logical AVX AVX2 AVX512_VL AVX512_F
PSUBB Subtract Packed Integers MMX SSE2
PSUBW Subtract Packed Integers MMX SSE2
PSUBD Subtract Packed Integers MMX SSE2
VPSUBB Subtract Packed Integers AVX AVX2 AVX512_VL AVX512_BW
VPSUBW Subtract Packed Integers AVX AVX2 AVX512_VL AVX512_BW
VPSUBD Subtract Packed Integers AVX AVX2 AVX512_VL AVX512_F
PSUBQ Subtract Packed Quadword Integers SSE2
VPSUBQ Subtract Packed Quadword Integers AVX AVX2 AVX512_VL AVX512_F
PSUBSB Subtract Packed Signed Integers with Signed Saturation MMX SSE2
PSUBSW Subtract Packed Signed Integers with Signed Saturation MMX SSE2
VPSUBSB Subtract Packed Signed Integers with Signed Saturation AVX AVX2 AVX512_VL AVX512_BW
VPSUBSW Subtract Packed Signed Integers with Signed Saturation AVX AVX2 AVX512_VL AVX512_BW
PSUBUSB Subtract Packed Unsigned Integers with Unsigned Saturation MMX SSE2
PSUBUSW Subtract Packed Unsigned Integers with Unsigned Saturation MMX SSE2
VPSUBUSB Subtract Packed Unsigned Integers with Unsigned Saturation AVX AVX2 AVX512_VL AVX512_BW
VPSUBUSW Subtract Packed Unsigned Integers with Unsigned Saturation AVX AVX2 AVX512_VL AVX512_BW
PUNPCKHBW Unpack High Data MMX SSE2
PUNPCKHWD Unpack High Data MMX SSE2
PUNPCKHDQ Unpack High Data MMX SSE2
PUNPCKHQDQ Unpack High Data SSE2
VPUNPCKHBW Unpack High Data AVX AVX2 AVX512_VL AVX512_BW
VPUNPCKHWD Unpack High Data AVX AVX2 AVX512_VL AVX512_BW
VPUNPCKHDQ Unpack High Data AVX AVX2 AVX512_VL AVX512_F
VPUNPCKHQDQ Unpack High Data AVX AVX2 AVX512_VL AVX512_F
PUNPCKLBW Unpack Low Data MMX SSE2
PUNPCKLWD Unpack Low Data MMX SSE2
PUNPCKLDQ Unpack Low Data MMX SSE2
PUNPCKLQDQ Unpack Low Data SSE2
VPUNPCKLBW Unpack Low Data AVX AVX2 AVX512_VL AVX512_BW
VPUNPCKLWD Unpack Low Data AVX AVX2 AVX512_VL AVX512_BW
VPUNPCKLDQ Unpack Low Data AVX AVX2 AVX512_VL AVX512_F
VPUNPCKLQDQ Unpack Low Data AVX AVX2 AVX512_VL AVX512_F
PUSH Push Word, Doubleword or Quadword Onto the Stack 8086 386 X64
PUSHA Push All General-Purpose Registers 8086
PUSHAD Push All General-Purpose Registers 8086
PUSHF Push EFLAGS Register onto the Stack 8086
PUSHFD Push EFLAGS Register onto the Stack 8086
PUSHFQ Push EFLAGS Register onto the Stack 8086
PXOR Logical Exclusive OR MMX SSE2
VPXOR Logical Exclusive OR AVX AVX2
VPXORD Logical Exclusive OR AVX512_VL AVX512_F
VPXORQ Logical Exclusive OR AVX512_VL AVX512_F
RCL Rotate 8086 386 X64
RCR Rotate 8086 386 X64
ROL Rotate 8086 386 X64
ROR Rotate 8086 386 X64
RCPPS Compute Reciprocals of Packed Single-Precision Floating-Point Values SSE
VRCPPS Compute Reciprocals of Packed Single-Precision Floating-Point Values AVX
RCPSS Compute Reciprocal of Scalar Single-Precision Floating-Point Values SSE
VRCPSS Compute Reciprocal of Scalar Single-Precision Floating-Point Values AVX
RDFSBASE Read FS/GS Segment Base FSGSBASE
RDGSBASE Read FS/GS Segment Base FSGSBASE
RDMSR Read from Model Specific Register 8086
RDPID Read Processor ID RDPID
RDPKRU Read Protection Key Rights for User Pages 8086
RDPMC Read Performance-Monitoring Counters 8086
RDRAND Read Random Number RDRAND
RDSEED Read Random SEED RDSEED
RDTSC Read Time-Stamp Counter 8086
RDTSCP Read Time-Stamp Counter and Processor ID 8086
REP_INS Repeat String Operation Prefix 8086 386
REP_MOVS Repeat String Operation Prefix 8086 386 X64
REP_OUTS Repeat String Operation Prefix 8086 386
REP_LODS Repeat String Operation Prefix 8086
REP_STOS Repeat String Operation Prefix 8086 386 X64
REPE_CMPS Repeat String Operation Prefix 8086 386 X64
REPE_SCAS Repeat String Operation Prefix 8086 386 X64
REPNE_CMPS Repeat String Operation Prefix 8086 386 X64
REPNE_SCAS Repeat String Operation Prefix 8086 386 X64
RET Return from Procedure 8086
RORX Rotate Right Logical Without Affecting Flags BMI2
ROUNDPD Round Packed Double Precision Floating-Point Values SSE4_1
VROUNDPD Round Packed Double Precision Floating-Point Values AVX
ROUNDPS Round Packed Single Precision Floating-Point Values SSE4_1
VROUNDPS Round Packed Single Precision Floating-Point Values AVX
ROUNDSD Round Scalar Double Precision Floating-Point Values SSE4_1
VROUNDSD Round Scalar Double Precision Floating-Point Values AVX
ROUNDSS Round Scalar Single Precision Floating-Point Values SSE4_1
VROUNDSS Round Scalar Single Precision Floating-Point Values AVX
RSM Resume from System Management Mode 8086
RSQRTPS Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values SSE
VRSQRTPS Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values AVX
RSQRTSS Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value SSE
VRSQRTSS Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value AVX
SAHF Store AH into Flags 8086
SAL Shift 8086 386 X64
SAR Shift 8086 386 X64
SHL Shift 8086 386 X64
SHR Shift 8086 386 X64
SARX Shift Without Affecting Flags BMI2
SHLX Shift Without Affecting Flags BMI2
SHRX Shift Without Affecting Flags BMI2
SBB Integer Subtraction with Borrow 8086 386 X64
SCAS Scan String 8086 386 X64
SCASB Scan String 8086
SCASW Scan String 8086
SCASD Scan String 8086
SCASQ Scan String 8086
SETA Set Byte on Condition 8086
SETAE Set Byte on Condition 8086
SETB Set Byte on Condition 8086
SETBE Set Byte on Condition 8086
SETC Set Byte on Condition 8086
SETE Set Byte on Condition 8086
SETG Set Byte on Condition 8086
SETGE Set Byte on Condition 8086
SETL Set Byte on Condition 8086
SETLE Set Byte on Condition 8086
SETNA Set Byte on Condition 8086
SETNAE Set Byte on Condition 8086
SETNB Set Byte on Condition 8086
SETNBE Set Byte on Condition 8086
SETNC Set Byte on Condition 8086
SETNE Set Byte on Condition 8086
SETNG Set Byte on Condition 8086
SETNGE Set Byte on Condition 8086
SETNL Set Byte on Condition 8086
SETNLE Set Byte on Condition 8086
SETNO Set Byte on Condition 8086
SETNP Set Byte on Condition 8086
SETNS Set Byte on Condition 8086
SETNZ Set Byte on Condition 8086
SETO Set Byte on Condition 8086
SETP Set Byte on Condition 8086
SETPE Set Byte on Condition 8086
SETPO Set Byte on Condition 8086
SETS Set Byte on Condition 8086
SETZ Set Byte on Condition 8086
SFENCE Store Fence 8086
SGDT Store Global Descriptor Table Register 8086
SHA1MSG1 Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords SHA
SHA1MSG2 Perform a Final Calculation for the Next Four SHA1 Message Dwords SHA
SHA1NEXTE Calculate SHA1 State Variable E after Four Rounds SHA
SHA1RNDS4 Perform Four Rounds of SHA1 Operation SHA
SHA256MSG1 Perform an Intermediate Calculation for the Next Four SHA256 Message Dwords SHA
SHA256MSG2 Perform a Final Calculation for the Next Four SHA256 Message Dwords SHA
SHA256RNDS2 Perform Two Rounds of SHA256 Operation SHA
SHLD Double Precision Shift Left 8086 386 X64
SHRD Double Precision Shift Right 8086 386 X64
SHUFPD Packed Interleave Shuffle of Pairs of Double-Precision Floating-Point Values SSE2
VSHUFPD Packed Interleave Shuffle of Pairs of Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
SHUFPS Packed Interleave Shuffle of Quadruplets of Single-Precision Floating-Point Values SSE
VSHUFPS Packed Interleave Shuffle of Quadruplets of Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
SIDT Store Interrupt Descriptor Table Register 8086
SLDT Store Local Descriptor Table Register 8086 X64
SMSW Store Machine Status Word 8086 386 X64
SQRTPD Square Root of Double-Precision Floating-Point Values SSE2
VSQRTPD Square Root of Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
SQRTPS Square Root of Single-Precision Floating-Point Values SSE
VSQRTPS Square Root of Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
SQRTSD Compute Square Root of Scalar Double-Precision Floating-Point Value SSE2
VSQRTSD Compute Square Root of Scalar Double-Precision Floating-Point Value AVX AVX512_F
SQRTSS Compute Square Root of Scalar Single-Precision Value SSE
VSQRTSS Compute Square Root of Scalar Single-Precision Value AVX AVX512_F
STAC Set AC Flag in EFLAGS Register
STC Set Carry Flag 8086
STD Set Direction Flag 8086
STI Set Interrupt Flag 8086
STMXCSR Store MXCSR Register State SSE
VSTMXCSR Store MXCSR Register State AVX
STOS Store String 8086 386 X64
STOSB Store String 8086
STOSW Store String 8086
STOSD Store String 8086
STOSQ Store String 8086
STR Store Task Register 8086
SUB Subtract 8086 386 X64
SUBPD Subtract Packed Double-Precision Floating-Point Values SSE2
VSUBPD Subtract Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
SUBPS Subtract Packed Single-Precision Floating-Point Values SSE
VSUBPS Subtract Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
SUBSD Subtract Scalar Double-Precision Floating-Point Value SSE2
VSUBSD Subtract Scalar Double-Precision Floating-Point Value AVX AVX512_F
SUBSS Subtract Scalar Single-Precision Floating-Point Value SSE
VSUBSS Subtract Scalar Single-Precision Floating-Point Value AVX AVX512_F
SWAPGS Swap GS Base Register 8086
SYSCALL Fast System Call 8086
SYSENTER Fast System Call 8086
SYSEXIT Fast Return from Fast System Call 8086
SYSRET Return From Fast System Call 8086
TEST Logical Compare 8086 386 X64
TPAUSE Timed PAUSE WAITPKG
TZCNT Count the Number of Trailing Zero Bits BMI1
UCOMISD Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS SSE2
VUCOMISD Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS AVX AVX512_F
UCOMISS Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS SSE
VUCOMISS Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS AVX AVX512_F
UD01 Undefined Instruction 386
UD1 Undefined Instruction 386
UD2 Undefined Instruction 8086
UMONITOR User Level Set Up Monitor Address WAITPKG
UMWAIT User Level Monitor Wait WAITPKG
UNPCKHPD Unpack and Interleave High Packed Double-Precision Floating-Point Values SSE2
VUNPCKHPD Unpack and Interleave High Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
UNPCKHPS Unpack and Interleave High Packed Single-Precision Floating-Point Values SSE
VUNPCKHPS Unpack and Interleave High Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
UNPCKLPD Unpack and Interleave Low Packed Double-Precision Floating-Point Values SSE2
VUNPCKLPD Unpack and Interleave Low Packed Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
UNPCKLPS Unpack and Interleave Low Packed Single-Precision Floating-Point Values SSE
VUNPCKLPS Unpack and Interleave Low Packed Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
V4FMADDPS Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations) AVX512_4FMAPS
V4FNMADDPS Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations) AVX512_4FMAPS
V4FMADDSS Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations) AVX512_4FMAPS
V4FNMADDSS Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations) AVX512_4FMAPS
VAESDEC Perform One Round of an AES Decryption Flow AVX512_VAES AVX512_VL AVX512_F
VAESDECLAST Perform Last Round of an AES Decryption Flow AVX512_VAES AVX512_VL AVX512_F
VAESENC Perform One Round of an AES Encryption Flow AVX512_VAES AVX512_VL AVX512_F
VAESENCLAST Perform Last Round of an AES Encryption Flow AVX512_VAES AVX512_VL AVX512_F
VALIGND Align Doubleword/Quadword Vectors AVX512_VL AVX512_F
VALIGNQ Align Doubleword/Quadword Vectors AVX512_VL AVX512_F
VBLENDMPD Blend Float64/Float32 Vectors Using an OpMask Control AVX512_VL AVX512_F
VBLENDMPS Blend Float64/Float32 Vectors Using an OpMask Control AVX512_VL AVX512_F
VBROADCASTSS Load with Broadcast Floating-Point Data AVX AVX2 AVX512_VL AVX512_F
VBROADCASTSD Load with Broadcast Floating-Point Data AVX AVX2 AVX512_VL AVX512_F
VBROADCASTF128 Load with Broadcast Floating-Point Data AVX
VBROADCASTF32X2 Load with Broadcast Floating-Point Data AVX512_VL AVX512_DQ
VBROADCASTF32X4 Load with Broadcast Floating-Point Data AVX512_VL AVX512_F
VBROADCASTF64X2 Load with Broadcast Floating-Point Data AVX512_VL AVX512_DQ
VBROADCASTF32X8 Load with Broadcast Floating-Point Data AVX512_DQ
VBROADCASTF64X4 Load with Broadcast Floating-Point Data AVX512_F
VCOMPRESSPD Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory AVX512_VL AVX512_F
VCOMPRESSPS Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory AVX512_VL AVX512_F
VCVTNE2PS2BF16 Convert Two Packed Single Data to One Packed BF16 Data AVX512_VL AVX512_BF16 AVX512_F
VCVTNEPS2BF16 Convert Packed Single Data to Packed BF16 Data AVX512_VL AVX512_BF16 AVX512_F
VCVTPD2QQ Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers AVX512_VL AVX512_DQ
VCVTPD2UDQ Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers AVX512_VL AVX512_F
VCVTPD2UQQ Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers AVX512_VL AVX512_DQ
VCVTPH2PS Convert 16-bit FP values to Single-Precision FP values F16C AVX512_VL AVX512_F
VCVTPS2PH Convert Single-Precision FP value to 16-bit FP value F16C AVX512_VL AVX512_F
VCVTPS2QQ Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values AVX512_VL AVX512_DQ
VCVTPS2UDQ Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values AVX512_VL AVX512_F
VCVTPS2UQQ Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values AVX512_VL AVX512_DQ
VCVTQQ2PD Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values AVX512_VL AVX512_DQ
VCVTQQ2PS Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values AVX512_VL AVX512_DQ
VCVTSD2USI Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer AVX512_F
VCVTSS2USI Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer AVX512_F
VCVTTPD2QQ Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers AVX512_VL AVX512_DQ
VCVTTPD2UDQ Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers AVX512_VL AVX512_F
VCVTTPD2UQQ Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers AVX512_VL AVX512_DQ
VCVTTPS2QQ Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values AVX512_VL AVX512_DQ
VCVTTPS2UDQ Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values AVX512_VL AVX512_F
VCVTTPS2UQQ Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values AVX512_VL AVX512_DQ
VCVTTSD2USI Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer AVX512_F
VCVTTSS2USI Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer AVX512_F
VCVTUDQ2PD Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values AVX512_VL AVX512_F
VCVTUDQ2PS Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values AVX512_VL AVX512_F
VCVTUQQ2PD Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values AVX512_VL AVX512_DQ
VCVTUQQ2PS Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values AVX512_VL AVX512_DQ
VCVTUSI2SD Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value AVX512_F
VCVTUSI2SS Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value AVX512_F
VDBPSADBW Double Block Packed Sum-Absolute-Differences (SAD) on Unsigned Bytes AVX512_VL AVX512_BW
VDPBF16PS Dot Product of BF16 Pairs Accumulated into Packed Single Precision AVX512_VL AVX512_BF16 AVX512_F
VERR Verify a Segment for Reading or Writing 8086
VERW Verify a Segment for Reading or Writing 8086
VEXP2PD Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error AVX512_ER
VEXP2PS Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error AVX512_ER
VEXPANDPD Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory AVX512_VL AVX512_F
VEXPANDPS Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory AVX512_VL AVX512_F
VEXTRACTF128 Extra ct Packed Floating-Point Values AVX
VEXTRACTF32X4 Extra ct Packed Floating-Point Values AVX512_VL AVX512_F
VEXTRACTF64X2 Extra ct Packed Floating-Point Values AVX512_VL AVX512_DQ
VEXTRACTF32X8 Extra ct Packed Floating-Point Values AVX512_DQ
VEXTRACTF64X4 Extra ct Packed Floating-Point Values AVX512_F
VEXTRACTI128 Extract packed Integer Values AVX2
VEXTRACTI32X4 Extract packed Integer Values AVX512_VL AVX512_F
VEXTRACTI64X2 Extract packed Integer Values AVX512_VL AVX512_DQ
VEXTRACTI32X8 Extract packed Integer Values AVX512_DQ
VEXTRACTI64X4 Extract packed Integer Values AVX512_F
VFIXUPIMMPD Fix Up Special Packed Float64 Values AVX512_VL AVX512_F
VFIXUPIMMPS Fix Up Special Packed Float32 Values AVX512_VL AVX512_F
VFIXUPIMMSD Fix Up Special Scalar Float64 Value AVX512_F
VFIXUPIMMSS Fix Up Special Scalar Float32 Value AVX512_F
VFMADD132PD Fused Multiply-Add of Packed Double- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMADD213PD Fused Multiply-Add of Packed Double- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMADD231PD Fused Multiply-Add of Packed Double- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMADD132PS Fused Multiply-Add of Packed Single- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMADD213PS Fused Multiply-Add of Packed Single- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMADD231PS Fused Multiply-Add of Packed Single- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMADD132SD Fused Multiply-Add of Scalar Double- Precision Floating-Point Values FMA AVX512_F
VFMADD213SD Fused Multiply-Add of Scalar Double- Precision Floating-Point Values FMA AVX512_F
VFMADD231SD Fused Multiply-Add of Scalar Double- Precision Floating-Point Values FMA AVX512_F
VFMADD132SS Fused Multiply-Add of Scalar Single-Precision Floating-Point Values FMA AVX512_F
VFMADD213SS Fused Multiply-Add of Scalar Single-Precision Floating-Point Values FMA AVX512_F
VFMADD231SS Fused Multiply-Add of Scalar Single-Precision Floating-Point Values FMA AVX512_F
VFMADDSUB132PD Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMADDSUB213PD Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMADDSUB231PD Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMADDSUB132PS Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMADDSUB213PS Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMADDSUB231PS Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUB132PD Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUB213PD Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUB231PD Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUB132PS Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUB213PS Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUB231PS Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUB132SD Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values FMA AVX512_F
VFMSUB213SD Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values FMA AVX512_F
VFMSUB231SD Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values FMA AVX512_F
VFMSUB132SS Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values FMA AVX512_F
VFMSUB213SS Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values FMA AVX512_F
VFMSUB231SS Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values FMA AVX512_F
VFMSUBADD132PD Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUBADD213PD Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUBADD231PD Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUBADD132PS Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUBADD213PS Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFMSUBADD231PS Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMADD132PD Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMADD213PD Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMADD231PD Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMADD132PS Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMADD213PS Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMADD231PS Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMADD132SD Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values FMA AVX512_F
VFNMADD213SD Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values FMA AVX512_F
VFNMADD231SD Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values FMA AVX512_F
VFNMADD132SS Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values FMA AVX512_F
VFNMADD213SS Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values FMA AVX512_F
VFNMADD231SS Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values FMA AVX512_F
VFNMSUB132PD Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMSUB213PD Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMSUB231PD Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMSUB132PS Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMSUB213PS Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMSUB231PS Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values FMA AVX512_VL AVX512_F
VFNMSUB132SD Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values FMA AVX512_F
VFNMSUB213SD Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values FMA AVX512_F
VFNMSUB231SD Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values FMA AVX512_F
VFNMSUB132SS Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values FMA AVX512_F
VFNMSUB213SS Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values FMA AVX512_F
VFNMSUB231SS Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values FMA AVX512_F
VFPCLASSPD Tests Types Of a Packed Float64 Values AVX512_VL AVX512_DQ
VFPCLASSPS Tests Types Of a Packed Float32 Values AVX512_VL AVX512_DQ
VFPCLASSSD Tests Types Of a Scalar Float64 Values AVX512_DQ
VFPCLASSSS Tests Types Of a Scalar Float32 Values AVX512_DQ
VGATHERDPD Gather Packed DP FP Values Using Signed Dword/Qword Indices AVX2
VGATHERQPD Gather Packed DP FP Values Using Signed Dword/Qword Indices AVX2
VGATHERDPS Gather Packed Single, Packed Double with Signed Dword AVX512_VL AVX512_F
VGATHERDPD Gather Packed Single, Packed Double with Signed Dword AVX512_VL AVX512_F
VGATHERDPS Gather Packed SP FP values Using Signed Dword/Qword Indices AVX2
VGATHERQPS Gather Packed SP FP values Using Signed Dword/Qword Indices AVX2
VGATHERPF0DPS Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint AVX512_PF
VGATHERPF0QPS Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint AVX512_PF
VGATHERPF0DPD Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint AVX512_PF
VGATHERPF0QPD Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint AVX512_PF
VGATHERPF1DPS Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint AVX512_PF
VGATHERPF1QPS Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint AVX512_PF
VGATHERPF1DPD Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint AVX512_PF
VGATHERPF1QPD Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint AVX512_PF
VGATHERQPS Gather Packed Single, Packed Double with Signed Qword Indices AVX512_VL AVX512_F
VGATHERQPD Gather Packed Single, Packed Double with Signed Qword Indices AVX512_VL AVX512_F
VGETEXPPD Convert Exponents of Packed DP FP Values to DP FP Values AVX512_VL AVX512_F
VGETEXPPS Convert Exponents of Packed SP FP Values to SP FP Values AVX512_VL AVX512_F
VGETEXPSD Convert Exponents of Scalar DP FP Values to DP FP Value AVX512_F
VGETEXPSS Convert Exponents of Scalar SP FP Values to SP FP Value AVX512_F
VGETMANTPD Extract Float64 Vector of Normalized Mantissas from Float64 Vector AVX512_VL AVX512_F
VGETMANTPS Extract Float32 Vector of Normalized Mantissas from Float32 Vector AVX512_VL AVX512_F
VGETMANTSD Extract Float64 of Normalized Mantissas from Float64 Scalar AVX512_F
VGETMANTSS Extract Float32 Vector of Normalized Mantissa from Float32 Vector AVX512_F
VINSERTF128 Insert Packed Floating-Point Values AVX
VINSERTF32X4 Insert Packed Floating-Point Values AVX512_VL AVX512_F
VINSERTF64X2 Insert Packed Floating-Point Values AVX512_VL AVX512_DQ
VINSERTF32X8 Insert Packed Floating-Point Values AVX512_DQ
VINSERTF64X4 Insert Packed Floating-Point Values AVX512_F
VINSERTI128 Insert Packed Integer Values AVX2
VINSERTI32X4 Insert Packed Integer Values AVX512_VL AVX512_F
VINSERTI64X2 Insert Packed Integer Values AVX512_VL AVX512_DQ
VINSERTI32X8 Insert Packed Integer Values AVX512_DQ
VINSERTI64X4 Insert Packed Integer Values AVX512_F
VMASKMOVPS Conditional SIMD Packed Loads and Stores AVX
VMASKMOVPD Conditional SIMD Packed Loads and Stores AVX
VP2INTERSECTD Compute Intersection Between DWORDS/QUADWORDS to a Pair of Mask Registers AVX512_VL AVX512_VP2INTERSECT AVX512_F
VP2INTERSECTQ Compute Intersection Between DWORDS/QUADWORDS to a Pair of Mask Registers AVX512_VL AVX512_VP2INTERSECT AVX512_F
VP4DPWSSD Dot Product of Signed Words with Dword Accumulation (4-iterations) AVX512_4VNNIW
VP4DPWSSDS Dot Product of Signed Words with Dword Accumulation and Saturation (4-iterations) AVX512_4VNNIW
VPBLENDD Blend Packed Dwords AVX2
VPBLENDMB Blend Byte/Word Vectors Using an Opmask Control AVX512_VL AVX512_BW
VPBLENDMW Blend Byte/Word Vectors Using an Opmask Control AVX512_VL AVX512_BW
VPBLENDMD Blend Int32/Int64 Vectors Using an OpMask Control AVX512_VL AVX512_F
VPBLENDMQ Blend Int32/Int64 Vectors Using an OpMask Control AVX512_VL AVX512_F
VPBROADCASTB Load Integer and Broadcast AVX2 AVX512_VL AVX512_BW
VPBROADCASTW Load Integer and Broadcast AVX2 AVX512_VL AVX512_BW
VPBROADCASTD Load Integer and Broadcast AVX2 AVX512_VL AVX512_F
VPBROADCASTQ Load Integer and Broadcast AVX2 AVX512_VL AVX512_F
VBROADCASTI32X2 Load Integer and Broadcast AVX512_VL AVX512_DQ
VBROADCASTI128 Load Integer and Broadcast AVX2
VBROADCASTI32X4 Load Integer and Broadcast AVX512_VL AVX512_F
VBROADCASTI64X2 Load Integer and Broadcast AVX512_VL AVX512_DQ
VBROADCASTI32X8 Load Integer and Broadcast AVX512_DQ
VBROADCASTI64X4 Load Integer and Broadcast AVX512_F
VPBROADCASTB Load with Broadcast Integer Data from General Purpose Register AVX512_VL AVX512_BW
VPBROADCASTW Load with Broadcast Integer Data from General Purpose Register AVX512_VL AVX512_BW
VPBROADCASTD Load with Broadcast Integer Data from General Purpose Register AVX512_VL AVX512_F
VPBROADCASTQ Load with Broadcast Integer Data from General Purpose Register AVX512_VL AVX512_F
VPBROADCASTMB2Q Broadcast Mask to Vector Register AVX512_VL AVX512_CD
VPBROADCASTMW2D Broadcast Mask to Vector Register AVX512_VL AVX512_CD
VPCLMULQDQ Carry-Less Multiplication Quadword AVX512_VPCLMULQDQ AVX512_VL AVX512_F
VPCMPB Compare Packed Byte Values Into Mask AVX512_VL AVX512_BW
VPCMPUB Compare Packed Byte Values Into Mask AVX512_VL AVX512_BW
VPCMPD Compare Packed Integer Values into Mask AVX512_VL AVX512_F
VPCMPUD Compare Packed Integer Values into Mask AVX512_VL AVX512_F
VPCMPQ Compare Packed Integer Values into Mask AVX512_VL AVX512_F
VPCMPUQ Compare Packed Integer Values into Mask AVX512_VL AVX512_F
VPCMPW Compare Packed Word Values Into Mask AVX512_VL AVX512_BW
VPCMPUW Compare Packed Word Values Into Mask AVX512_VL AVX512_BW
VPCOMPRESSB Store Sparse Packed Byte/Word Integer Values into Dense Memory/Register AVX512_VBMI2 AVX512_VL
VPCOMPRESSW Store Sparse Packed Byte/Word Integer Values into Dense Memory/Register AVX512_VBMI2 AVX512_VL
VPCOMPRESSD Store Sparse Packed Doubleword Integer Values into Dense Memory/Register AVX512_VL AVX512_F
VPCOMPRESSQ Store Sparse Packed Quadword Integer Values into Dense Memory/Register AVX512_VL AVX512_F
VPCONFLICTD Detect Conflicts Within a Vector of Packed Dword/Qword Values into Dense Memory/ Register AVX512_VL AVX512_CD
VPCONFLICTQ Detect Conflicts Within a Vector of Packed Dword/Qword Values into Dense Memory/ Register AVX512_VL AVX512_CD
VPDPBUSD Multiply and Add Unsigned and Signed Bytes AVX512_VNNI AVX512_VL
VPDPBUSDS Multiply and Add Unsigned and Signed Bytes with Saturation AVX512_VNNI AVX512_VL
VPDPWSSD Multiply and Add Signed Word Integers AVX512_VNNI AVX512_VL
VPDPWSSDS Multiply and Add Signed Word Integers with Saturation AVX512_VNNI AVX512_VL
VPERM2F128 Permute Floating-Point Values AVX
VPERM2I128 Permute Integer Values AVX2
VPERMB Permute Packed Bytes Elements AVX512_VL AVX512_VBMI
VPERMD Permute Packed Doublewords/Words Elements AVX2 AVX512_VL AVX512_F
VPERMW Permute Packed Doublewords/Words Elements AVX512_VL AVX512_BW
VPERMI2B Full Permute of Bytes from Two Tables Overwriting the Index AVX512_VL AVX512_VBMI
VPERMI2W Full Permute From Two Tables Overwriting the Index AVX512_VL AVX512_BW
VPERMI2D Full Permute From Two Tables Overwriting the Index AVX512_VL AVX512_F
VPERMI2Q Full Permute From Two Tables Overwriting the Index AVX512_VL AVX512_F
VPERMI2PS Full Permute From Two Tables Overwriting the Index AVX512_VL AVX512_F
VPERMI2PD Full Permute From Two Tables Overwriting the Index AVX512_VL AVX512_F
VPERMILPD Permute In-Lane of Pairs of Double-Precision Floating-Point Values AVX AVX512_VL AVX512_F
VPERMILPS Permute In-Lane of Quadruples of Single-Precision Floating-Point Values AVX AVX512_VL AVX512_F
VPERMPD Permute Double-Precision Floating-Point Elements AVX2 AVX512_VL AVX512_F
VPERMPS Permute Single-Precision Floating-Point Elements AVX2 AVX512_VL AVX512_F
VPERMQ Qwords Element Permutation AVX2 AVX512_VL AVX512_F
VPERMT2B Full Permute of Bytes from Two Tables Overwriting a Table AVX512_VL AVX512_VBMI
VPERMT2W Full Permute from Two Tables Overwriting one Table AVX512_VL AVX512_BW
VPERMT2D Full Permute from Two Tables Overwriting one Table AVX512_VL AVX512_F
VPERMT2Q Full Permute from Two Tables Overwriting one Table AVX512_VL AVX512_F
VPERMT2PS Full Permute from Two Tables Overwriting one Table AVX512_VL AVX512_F
VPERMT2PD Full Permute from Two Tables Overwriting one Table AVX512_VL AVX512_F
VPEXPANDB Expand Byte/Word Values AVX512_VBMI2 AVX512_VL
VPEXPANDW Expand Byte/Word Values AVX512_VBMI2 AVX512_VL
VPEXPANDD Load Sparse Packed Doubleword Integer Values from Dense Memory / Register AVX512_VL AVX512_F
VPEXPANDQ Load Sparse Packed Quadword Integer Values from Dense Memory / Register AVX512_VL AVX512_F
VPGATHERDD Gather Packed Dword, Packed Qword with Signed Dword Indices AVX512_VL AVX512_F
VPGATHERDQ Gather Packed Dword, Packed Qword with Signed Dword Indices AVX512_VL AVX512_F
VPGATHERDD Gather Packed Dword Values Using Signed Dword/Qword Indices AVX2
VPGATHERQD Gather Packed Dword Values Using Signed Dword/Qword Indices AVX2
VPGATHERDQ Gather Packed Qword Values Using Signed Dword/Qword Indices AVX2
VPGATHERQQ Gather Packed Qword Values Using Signed Dword/Qword Indices AVX2
VPGATHERQD Gather Packed Dword, Packed Qword with Signed Qword Indices AVX512_VL AVX512_F
VPGATHERQQ Gather Packed Dword, Packed Qword with Signed Qword Indices AVX512_VL AVX512_F
VPLZCNTD Count the Number of Leading Zero Bits for Packed Dword, Packed Qword Values AVX512_VL AVX512_CD
VPLZCNTQ Count the Number of Leading Zero Bits for Packed Dword, Packed Qword Values AVX512_VL AVX512_CD
VPMADD52HUQ Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to 64-bit Accumulators AVX512_IFMA AVX512_VL
VPMADD52LUQ Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Qword Accumulators AVX512_IFMA AVX512_VL
VPMASKMOVD Conditional SIMD Integer Packed Loads and Stores AVX2
VPMASKMOVQ Conditional SIMD Integer Packed Loads and Stores AVX2
VPMOVB2M Convert a Vector Register to a Mask AVX512_VL AVX512_BW
VPMOVW2M Convert a Vector Register to a Mask AVX512_VL AVX512_BW
VPMOVD2M Convert a Vector Register to a Mask AVX512_VL AVX512_DQ
VPMOVQ2M Convert a Vector Register to a Mask AVX512_VL AVX512_DQ
VPMOVDB Down Convert DWord to Byte AVX512_VL AVX512_F
VPMOVSDB Down Convert DWord to Byte AVX512_VL AVX512_F
VPMOVUSDB Down Convert DWord to Byte AVX512_VL AVX512_F
VPMOVDW Down Convert DWord to Word AVX512_VL AVX512_F
VPMOVSDW Down Convert DWord to Word AVX512_VL AVX512_F
VPMOVUSDW Down Convert DWord to Word AVX512_VL AVX512_F
VPMOVM2B Convert a Mask Register to a Vector Register AVX512_VL AVX512_BW
VPMOVM2W Convert a Mask Register to a Vector Register AVX512_VL AVX512_BW
VPMOVM2D Convert a Mask Register to a Vector Register AVX512_VL AVX512_DQ
VPMOVM2Q Convert a Mask Register to a Vector Register AVX512_VL AVX512_DQ
VPMOVQB Down Convert QWord to Byte AVX512_VL AVX512_F
VPMOVSQB Down Convert QWord to Byte AVX512_VL AVX512_F
VPMOVUSQB Down Convert QWord to Byte AVX512_VL AVX512_F
VPMOVQD Down Convert QWord to DWord AVX512_VL AVX512_F
VPMOVSQD Down Convert QWord to DWord AVX512_VL AVX512_F
VPMOVUSQD Down Convert QWord to DWord AVX512_VL AVX512_F
VPMOVQW Down Convert QWord to Word AVX512_VL AVX512_F
VPMOVSQW Down Convert QWord to Word AVX512_VL AVX512_F
VPMOVUSQW Down Convert QWord to Word AVX512_VL AVX512_F
VPMOVWB Down Convert Word to Byte AVX512_VL AVX512_BW
VPMOVSWB Down Convert Word to Byte AVX512_VL AVX512_BW
VPMOVUSWB Down Convert Word to Byte AVX512_VL AVX512_BW
VPMULTISHIFTQB Select Packed Unaligned Bytes from Quadword Sources AVX512_VBMI AVX512_VL
VPOPCNTB Return the Count of Number of Bits Set to 1 in BYTE/WORD/DWORD/QWORD AVX512_BITALG AVX512_VL
VPOPCNTW Return the Count of Number of Bits Set to 1 in BYTE/WORD/DWORD/QWORD AVX512_BITALG AVX512_VL
VPOPCNTD Return the Count of Number of Bits Set to 1 in BYTE/WORD/DWORD/QWORD AVX512_VPOPCNTDQ AVX512_VL
VPOPCNTQ Return the Count of Number of Bits Set to 1 in BYTE/WORD/DWORD/QWORD AVX512_VPOPCNTDQ AVX512_VL
VPROLVD Bit Rotate Left AVX512_VL AVX512_F
VPROLD Bit Rotate Left AVX512_VL AVX512_F
VPROLVQ Bit Rotate Left AVX512_VL AVX512_F
VPROLQ Bit Rotate Left AVX512_VL AVX512_F
VPRORVD Bit Rotate Right AVX512_VL AVX512_F
VPRORD Bit Rotate Right AVX512_VL AVX512_F
VPRORVQ Bit Rotate Right AVX512_VL AVX512_F
VPRORQ Bit Rotate Right AVX512_VL AVX512_F
VPSCATTERDD Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices AVX512_VL AVX512_F
VPSCATTERDQ Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices AVX512_VL AVX512_F
VPSCATTERQD Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices AVX512_VL AVX512_F
VPSCATTERQQ Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices AVX512_VL AVX512_F
VPSHLDW Concatenate and Shift Packed Data Left Logical AVX512_VBMI2 AVX512_VL
VPSHLDD Concatenate and Shift Packed Data Left Logical AVX512_VBMI2 AVX512_VL
VPSHLDQ Concatenate and Shift Packed Data Left Logical AVX512_VBMI2 AVX512_VL
VPSHLDVW Concatenate and Variable Shift Packed Data Left Logical AVX512_VBMI2 AVX512_VL
VPSHLDVD Concatenate and Variable Shift Packed Data Left Logical AVX512_VBMI2 AVX512_VL
VPSHLDVQ Concatenate and Variable Shift Packed Data Left Logical AVX512_VBMI2 AVX512_VL
VPSHRDW Concatenate and Shift Packed Data Right Logical AVX512_VBMI2 AVX512_VL
VPSHRDD Concatenate and Shift Packed Data Right Logical AVX512_VBMI2 AVX512_VL
VPSHRDQ Concatenate and Shift Packed Data Right Logical AVX512_VBMI2 AVX512_VL
VPSHRDVW Concatenate and Variable Shift Packed Data Right Logical AVX512_VBMI2 AVX512_VL
VPSHRDVD Concatenate and Variable Shift Packed Data Right Logical AVX512_VBMI2 AVX512_VL
VPSHRDVQ Concatenate and Variable Shift Packed Data Right Logical AVX512_VBMI2 AVX512_VL
VPSHUFBITQMB Shuffle Bits from Quadword Elements Using Byte Indexes into Mask AVX512_BITALG AVX512_VL
VPSLLVD Variable Bit Shift Left Logical AVX2 AVX512_VL AVX512_F
VPSLLVQ Variable Bit Shift Left Logical AVX2 AVX512_VL AVX512_F
VPSLLVW Variable Bit Shift Left Logical AVX512_VL AVX512_BW
VPSRAVD Variable Bit Shift Right Arithmetic AVX2 AVX512_VL AVX512_F
VPSRAVW Variable Bit Shift Right Arithmetic AVX512_VL AVX512_BW
VPSRAVQ Variable Bit Shift Right Arithmetic AVX512_VL AVX512_F
VPSRLVD Variable Bit Shift Right Logical AVX2 AVX512_VL AVX512_F
VPSRLVQ Variable Bit Shift Right Logical AVX2 AVX512_VL AVX512_F
VPSRLVW Variable Bit Shift Right Logical AVX512_VL AVX512_BW
VPTERNLOGD Bitwise Ternary Logic AVX512_VL AVX512_F
VPTERNLOGQ Bitwise Ternary Logic AVX512_VL AVX512_F
VPTESTMB Logical AND and Set Mask AVX512_VL AVX512_BW
VPTESTMW Logical AND and Set Mask AVX512_VL AVX512_BW
VPTESTMD Logical AND and Set Mask AVX512_VL AVX512_F
VPTESTMQ Logical AND and Set Mask AVX512_VL AVX512_F
VPTESTNMB Logical NAND and Set AVX512_VL AVX512_BW AVX512_F
VPTESTNMW Logical NAND and Set AVX512_VL AVX512_BW AVX512_F
VPTESTNMD Logical NAND and Set AVX512_VL AVX512_F
VPTESTNMQ Logical NAND and Set AVX512_VL AVX512_F
VRANGEPD Range Restriction Calculation For Packed Pairs of Float64 Values AVX512_VL AVX512_DQ
VRANGEPS Range Restriction Calculation For Packed Pairs of Float32 Values AVX512_VL AVX512_DQ
VRANGESD Range Restriction Calculation From a pair of Scalar Float64 Values AVX512_DQ
VRANGESS Range Restriction Calculation From a Pair of Scalar Float32 Values AVX512_DQ
VRCP14PD Compute Approximate Reciprocals of Packed Float64 Values AVX512_VL AVX512_F
VRCP14PS Compute Approximate Reciprocals of Packed Float32 Values AVX512_VL AVX512_F
VRCP14SD Compute Approximate Reciprocal of Scalar Float64 Value AVX512_F
VRCP14SS Compute Approximate Reciprocal of Scalar Float32 Value AVX512_F
VRCP28PD Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error AVX512_ER
VRCP28PS Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error AVX512_ER
VRCP28SD Approximation to the Reciprocal of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error AVX512_ER
VRCP28SS Approximation to the Reciprocal of Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error AVX512_ER
VREDUCEPD Perform Reduction Transformation on Packed Float64 Values AVX512_VL AVX512_DQ
VREDUCEPS Perform Reduction Transformation on Packed Float32 Values AVX512_VL AVX512_DQ
VREDUCESD Perform a Reduction Transformation on a Scalar Float64 Value AVX512_DQ
VREDUCESS Perform a Reduction Transformation on a Scalar Float32 Value AVX512_DQ
VRNDSCALEPD Round Packed Float64 Values To Include A Given Number Of Fraction Bits AVX512_VL AVX512_F
VRNDSCALEPS Round Packed Float32 Values To Include A Given Number Of Fraction Bits AVX512_VL AVX512_F
VRNDSCALESD Round Scalar Float64 Value To Include A Given Number Of Fraction Bits AVX512_F
VRNDSCALESS Round Scalar Float32 Value To Include A Given Number Of Fraction Bits AVX512_F
VRSQRT14PD Compute Approximate Reciprocals of Square Roots of Packed Float64 Values AVX512_VL AVX512_F
VRSQRT14PS Compute Approximate Reciprocals of Square Roots of Packed Float32 Values AVX512_VL AVX512_F
VRSQRT14SD Compute Approximate Reciprocal of Square Root of Scalar Float64 Value AVX512_F
VRSQRT14SS Compute Approximate Reciprocal of Square Root of Scalar Float32 Value AVX512_F
VRSQRT28PD Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error AVX512_ER
VRSQRT28PS Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error AVX512_ER
VRSQRT28SD Approximation to the Reciprocal Square Root of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error AVX512_ER
VRSQRT28SS Approximation to the Reciprocal Square Root of Scalar Single-Precision Floating- Point Value with Less Than 2^-28 Relative Error AVX512_ER
VSCALEFPD Scale Packed Float64 Values With Float64 Values AVX512_VL AVX512_F
VSCALEFPS Scale Packed Float32 Values With Float32 Values AVX512_VL AVX512_F
VSCALEFSD Scale Scalar Float64 Values With Float64 Values AVX512_F
VSCALEFSS Scale Scalar Float32 Value With Float32 Value AVX512_F
VSCATTERDPS Scatter Packed Single, Packed Double with Signed Dword and Qword Indices AVX512_VL AVX512_F
VSCATTERDPD Scatter Packed Single, Packed Double with Signed Dword and Qword Indices AVX512_VL AVX512_F
VSCATTERQPS Scatter Packed Single, Packed Double with Signed Dword and Qword Indices AVX512_VL AVX512_F
VSCATTERQPD Scatter Packed Single, Packed Double with Signed Dword and Qword Indices AVX512_VL AVX512_F
VSCATTERPF0DPS Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write AVX512_PF
VSCATTERPF0QPS Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write AVX512_PF
VSCATTERPF0DPD Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write AVX512_PF
VSCATTERPF0QPD Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write AVX512_PF
VSCATTERPF1DPS Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write AVX512_PF
VSCATTERPF1QPS Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write AVX512_PF
VSCATTERPF1DPD Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write AVX512_PF
VSCATTERPF1QPD Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write AVX512_PF
VSHUFF32X4 Shuffle Packed Values at 128-bit Granularity AVX512_VL AVX512_F
VSHUFF64X2 Shuffle Packed Values at 128-bit Granularity AVX512_VL AVX512_F
VSHUFI32X4 Shuffle Packed Values at 128-bit Granularity AVX512_VL AVX512_F
VSHUFI64X2 Shuffle Packed Values at 128-bit Granularity AVX512_VL AVX512_F
VTESTPS Packed Bit Test AVX
VTESTPD Packed Bit Test AVX
VZEROALL Zero All YMM Registers AVX
VZEROUPPER Zero Upper Bits of YMM Registers AVX
WAIT Wait 8086
FWAIT Wait 8086
WBINVD Write Back and Invalidate Cache 8086
WBNOINVD Write Back and Do Not Invalidate Cache
WRFSBASE Write FS/GS Segment Base FSGSBASE
WRGSBASE Write FS/GS Segment Base FSGSBASE
WRMSR Write to Model Specific Register 8086
WRPKRU Write Data to User Page Key Register 8086
XABORT Transactional Abort RTM
XACQUIRE Hardware Lock Elision Prefix Hints 8086
XRELEASE Hardware Lock Elision Prefix Hints 8086
XADD Exchange and Add 8086 386 X64
XBEGIN Transactional Begin RTM
XCHG Exchange Register/Memory with Register 8086 386 X64
XEND Transactional End RTM
XGETBV Get Value of Extended Control Register 8086
XLAT Table Look-up Translation 8086
XLATB Table Look-up Translation 8086
XOR Logical Exclusive OR 8086 386 X64
XORPD Bitwise Logical XOR of Packed Double Precision Floating-Point Values SSE2
VXORPD Bitwise Logical XOR of Packed Double Precision Floating-Point Values AVX AVX512_VL AVX512_DQ
XORPS Bitwise Logical XOR of Packed Single Precision Floating-Point Values SSE
VXORPS Bitwise Logical XOR of Packed Single Precision Floating-Point Values AVX AVX512_VL AVX512_DQ
XRSTOR Restore Processor Extended States XSAVEOPT
XRSTOR64 Restore Processor Extended States XSAVEOPT
XRSTORS Restore Processor Extended States Supervisor XSAVEOPT
XRSTORS64 Restore Processor Extended States Supervisor XSAVEOPT
XSAVE Save Processor Extended States XSAVEOPT
XSAVE64 Save Processor Extended States XSAVEOPT
XSAVEC Save Processor Extended States with Compaction XSAVEOPT
XSAVEC64 Save Processor Extended States with Compaction XSAVEOPT
XSAVEOPT Save Processor Extended States Optimized XSAVEOPT
XSAVEOPT64 Save Processor Extended States Optimized XSAVEOPT
XSAVES Save Processor Extended States Supervisor XSAVEOPT
XSAVES64 Save Processor Extended States Supervisor XSAVEOPT
XSETBV Set Extended Control Register 8086
XTEST Test If In Transactional Execution HLE RTM
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