Releases: TerosTechnology/vscode-terosHDL
Releases · TerosTechnology/vscode-terosHDL
latest
Bug Fixes
- project config and global config #627 (qarlosalberto)
Chores
- add logging to schematic viewer #627 (qarlosalberto)
v6.0.1alpha
Commits
- fix retime in all the families #621 (qarlosalberto)
v5.0.11
Bug Fixes
- save project with relative paths (qarlosalberto)
v5.0.10
chore: ci test for json2yaml
v5.0.9
Features
- Improve GUI using Bootstrap.
v5.0.8
Bug Fixes
- documenter with tables (qarlosalberto)
v5.0.7
Features
- add alert when schematic graph exceeds the maximum size (qarlosalberto)
Chores
- update doc links (qarlosalberto)
v5.0.6
Features
- improve linter/formater path detection (qarlosalberto)
Bug Fixes
- component vhdl template (qarlosalberto)
Chores
- release notes (qarlosalberto)
v5.0.5
Bug Fixes
- error in linter when white spaces (qarlosalberto)
- bug restarting rusthdl (qarlosalberto)
Chores
- update version (qarlosalberto)
v5.0.4
Features
- gui support for vunit (qarlosalberto)
- more info if make fails (qarlosalberto)
- component template vhdl for verilog (qarlosalberto)
Bug Fixes
- error in verilog template (qarlosalberto)
- update LS vhdl (qarlosalberto)
Chores
- update version (qarlosalberto)