Efabless

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216 repositories

openlane2
Public
The next generation of OpenLane, rewritten from scratch with a modular architecture
flow asic eda verilog vlsi pnr silicon lvs flows sta
Python
•
Apache License 2.0
•41•248•75•12•Updated Dec 24, 2024Dec 24, 2024
openlane-metrics
Public
Repository to store metric results for OpenLane 2.0.0+
0•0•0•0•Updated Dec 24, 2024Dec 24, 2024
nix-eda
Public
Nix derivations for EDA tools
nix eda electronic-design-automation nix-flake
Nix
•
Apache License 2.0
•3•8•1•0•Updated Dec 24, 2024Dec 24, 2024
central_CI
Public
0•0•1•4•Updated Dec 23, 2024Dec 23, 2024
IHP-Open-PDK
Public
130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design
HTML
•
Apache License 2.0
•65•0•1•0•Updated Dec 22, 2024Dec 22, 2024
caravel_user_project
Public template
https://caravel-user-project.readthedocs.io
Verilog
•
Apache License 2.0
•332•186•84•22•Updated Dec 22, 2024Dec 22, 2024
caravel_SI_testing
Public
C
•1•2•3•5•Updated Dec 19, 2024Dec 19, 2024
sky130_klayout_pdk
Public
Skywaters 130nm Klayout PDK
pdk skywaters chipdesign
Python
•
Apache License 2.0
•13•20•6•1•Updated Dec 19, 2024Dec 19, 2024
caravel_mgmt_soc_litex
Public
https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/
Verilog
•
Apache License 2.0
•15•26•23•10•Updated Dec 18, 2024Dec 18, 2024
openlane2-ci-designs
Public
Continuous Integration Designs for OpenLane 2.0.0 or higher
Verilog
•1•0•0•2•Updated Dec 16, 2024Dec 16, 2024
openlane2-step-unit-tests
Public
Step-specific Unit Tests for OpenLane 2.0.0+
Verilog
•
Apache License 2.0
•0•0•0•0•Updated Dec 16, 2024Dec 16, 2024
ipm
Public
Open-source IPs Package Manager (IPM)
Python
•
Apache License 2.0
•2•14•6•3•Updated Dec 15, 2024Dec 15, 2024
BusWrap
Public
Python
•0•4•6•2•Updated Dec 15, 2024Dec 15, 2024
volare
Public
Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs
version-manager pdk openlane pdks python
Python
•
Apache License 2.0
•7•63•5•4•Updated Dec 12, 2024Dec 12, 2024
openframe_timer_example
Public
Example digital project for the Efabless Caravel "openframe" harness
Verilog
•
Apache License 2.0
•12•4•3•0•Updated Dec 11, 2024Dec 11, 2024
caravel_user_project_analog
Public template
Verilog
•
Apache License 2.0
•89•45•6•2•Updated Dec 11, 2024Dec 11, 2024
skywater-pdk-libs-sky130_fd_sc_hd
Public
Verilog
•
Apache License 2.0
•30•1•1•0•Updated Dec 11, 2024Dec 11, 2024
caravel
Public
Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.
magic yosys caravel picorv32 openroad vexriscv openram sky130
Verilog
•
Apache License 2.0
•69•300•98•14•Updated Dec 10, 2024Dec 10, 2024
caravel-sim-infrastructure
Public
HTML
•
Apache License 2.0
•4•1•2•0•Updated Dec 9, 2024Dec 9, 2024
cace
Public
Circuit Automatic Characterization Engine
Python
•
Apache License 2.0
•6•46•23•1•Updated Dec 6, 2024Dec 6, 2024
chipcraft---mest-course
Public
TL-Verilog
•
Creative Commons Zero v1.0 Universal
•9•30•0•0•Updated Dec 2, 2024Dec 2, 2024
sky130_pa_ip__instramp
Public
Instrumentation amplifier in sky130 by Phil Allen
Tcl
•
Apache License 2.0
•2•2•0•0•Updated Dec 2, 2024Dec 2, 2024
EF_PSRAM_CTRL_V2
Public
Verilog
•
Apache License 2.0
•0•1•3•0•Updated Nov 27, 2024Nov 27, 2024
sky130_ef_ip__adc3v_12bit
Public
12-bit ADC using other analog component repositories for the sample & hold, DAC, and comparator.
Verilog
•
Apache License 2.0
•2•0•0•0•Updated Nov 27, 2024Nov 27, 2024
sky130_ef_ip__ccomp3v
Public
Continuous analog comparator, 1mV resolution
Tcl
•
Apache License 2.0
•2•0•0•0•Updated Nov 27, 2024Nov 27, 2024
sky130_ef_ip__cdac3v_12bit
Public
12-bit capacitive DAC
Tcl
•2•0•0•0•Updated Nov 27, 2024Nov 27, 2024
sky130_ef_ip__analog_switches
Public
Set of analog switch circuits for general-purpose use
Shell
•
Apache License 2.0
•2•0•0•0•Updated Nov 27, 2024Nov 27, 2024
sky130_ef_ip__samplehold
Public
Analog 3.3V sample and hold circuit, with buffered output
Tcl
•
Apache License 2.0
•2•0•0•0•Updated Nov 27, 2024Nov 27, 2024
sky130_ef_ip__template
Public template
A template repository for analog designs to ensure consistency and interoperability between IP blocks.
Apache License 2.0
•0•0•0•0•Updated Nov 27, 2024Nov 27, 2024
skywater-pdk-libs-sky130_fd_pr
Public
Python
•
Apache License 2.0
•23•6•7•0•Updated Nov 27, 2024Nov 27, 2024