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Pull requests: llvm/circt
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[PyCDE][Handshake] Add bindings for Handshake functions
Handshake
PyCDE
Python CIRCT Design Entry API
[RTG] Add set type and operations
RTG
Involving the `rtg` dialect
#7848
opened Nov 19, 2024 by
maerhart
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Bump LLVM to 3cc852ece438a63e7b09d1c84a81d21598454e1a.
#7847
opened Nov 19, 2024 by
mikeurbach
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[Handshake][Python] Add Python bindings for Handshake
Handshake
Python
Python bindings
#7846
opened Nov 19, 2024 by
teqdruid
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[ExternalizeRegisters][NFC] Clean up initial value fetching
#7843
opened Nov 19, 2024 by
TaoBi22
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[SeqToSV] Do not use Involving the `seq` dialect
Verilog/SystemVerilog
Involving a Verilog dialect
always_ff
for compreg with initializer
Seq
#7838
opened Nov 19, 2024 by
fzi-hielscher
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[firtool] Run LowerFormalToHW pass when emitting SV
FIRRTL
Involving the `firrtl` dialect
verif
#7837
opened Nov 19, 2024 by
fabianschuiki
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[FIRRTL] Lower firrtl.formal to verif.formal
FIRRTL
Involving the `firrtl` dialect
#7836
opened Nov 19, 2024 by
fabianschuiki
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[ImportVerilog]: Create variables for function arguments
ImportVerilog
Moore
#7829
opened Nov 16, 2024 by
Max-astro
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[Draft] [OpLib] Create a Dialect for Representing Operator Libraries
#7771
opened Nov 4, 2024 by
andrewb1999
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Draft
[FIRRTL] Add a new FIRRTL annotation to specify type lowering behavior of module body
#7751
opened Oct 30, 2024 by
uenoku
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[SCFToCalyx] If op with sequential condition
Calyx
The Calyx dialect
#7687
opened Oct 9, 2024 by
jiahanxie353
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Updated in the last three days: updated:>2024-11-17.