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i#6662 public traces, part 1: synthetic ISA #6691
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Partial encoding of instr_t into raw byte*. It only encodes category as "synthetic opcode" for now. Issue: 6662
Not sure this is necessary, trying to solve build error.
through setting of instr ISA mode.
derekbruening
requested changes
Mar 6, 2024
have not been added yet. Using regular DR_REG_ for now.
encoding/decoding.
Wasn't returning next_pc in synthetic ISA decode function.
edeiana
commented
Mar 15, 2024
edeiana
commented
Mar 15, 2024
edeiana
commented
Mar 15, 2024
edeiana
commented
Mar 15, 2024
derekbruening
requested changes
Mar 15, 2024
instruction that is being decoded. Also setting the instr_t flags bit to mark the synthetic instruction as fully decoded.
references as source operands in the encoded synthetic instruction. Also avoiding duplicate register operands if the same register appears on different operands (note that we still distinguish between source and destination operands).
We need it because they are not fully decoded and their category is not set. Since the category is a fundamental piece in DR_ISA_REGDEPS, we want it to be set when testing the synthetic encoding/decoding.
Replaced with an add instruction with carry, so we test arithmetic flags.
edeiana
commented
Apr 7, 2024
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I think we're almost there; probably just one more round after we finalize the last couple of decisions.
between public encoding functions and instr_encode_arch(). Moved the check for DR_ISA_REGDEPS instructions there.
decoding DR_ISA_REGDEPS instructions.
derekbruening
approved these changes
Apr 9, 2024
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A synthetic ISA that has the purpose of preserving register dependencies and giving
hints on the type of operation an instruction performs. This PR implements the
encoding/decoding functionalities for this new ISA, which we call #DR_ISA_REGDEPS.
Note that being a synthetic ISA, some routines that work on instructions coming from an
actual ISA (such as #DR_ISA_AMD64) are not supported (e.g., decode_sizeof()).
Currently we support:
#DR_ISA_REGDEPS #instr_t.
into a sequence of contiguous bytes.
into an #instr_t.
A #DR_ISA_REGDEPS #instr_t contains the following information:
operation performed (e.g., a load, a store, a floating point math operation, a
branch, etc.). Note that categories are composable, hence more than one category
can be set. This information can be obtained using instr_get_category().
at least one arithmetic flag was read (all arithmetic flags will be set to read)
and/or written (all arithmetic flags will be set to written). This information
can be obtained using instr_get_arith_flags().
This information can be obtained using instr_num_srcs() and instr_num_dsts().
This information can be obtained by accessing the #instr_t operation_size field.
separated in source and destination. Note that these #reg_id_t identifiers are
virtual and it should not be assumed that they belong to any DR_REG_ enum value
of any specific architecture. These identifiers are meant for tracking register
dependencies with respect to other #DR_ISA_REGDEPS instructions only. These
lists can be obtained by walking the #instr_t operands with instr_get_dst() and
instr_get_src().
instr_get_isa_mode().
encoding. Note that this information is present only for decoded instructions
(i.e., #instr_t generated by decode() or decode_from_copy()). This information
can be obtained using instr_get_raw_bits().
information is present only for decoded instructions (i.e., #instr_t generated by
decode() or decode_from_copy()). This information can be obtained by accessing
the #instr_t length field.
Note that all routines that operate on #instr_t and #opnd_t are also supported for
#DR_ISA_REGDEPS instructions. However, querying information outside of those
described above (e.g., the instruction opcode with instr_get_opcode()) will return
the zeroed value set by instr_create() or instr_init() when the #instr_t was
created (e.g., instr_get_opcode() would return OP_INVALID).