Sampling and processing of audio data from microphone arrays

Style guide enforcement for VHDL

A tiny Open POWER ISA softcore written in VHDL 2008

A collection of reusable, high-quality, peer-reviewed VHDL building blocks.

A flexible and scalable development platform for modern FPGA projects.

An agile package manager and extensible build tool for HDLs

Open FPGA Modules

Scala based HDL

This Repository contains the basic VHDL code for different circuits we learn in Computer Architecture. All the provided codes run on EdaPlayground platform, thus divided into testbench code (that goes under testbench.vhd window )and design code (goes under design.vhd) for clarity.

This project aims to explore and compare different Kalman filter architectures and their performance on FPGA platforms. The focus is on two main applications: IMU sensor fusion for quadcopters and prediction in power electronics for microgrid renewable energy systems.

Auburn COMP 4300 Assignments

Digital logic design tool and simulator

VHDL compiler and simulator

Trabalhos, Projetos, Exercícios e aulas realizados em VHDL na cadeira de Fundamentos de sistemas digitais, matéria do segundo semestre.

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

Configurable AES-GCM IP (128, 192, 256 bits)

📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.

✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.

A VHDL IP for ECC (Elliptic Curve Cryptography) hardware acceleration