Post-synthesis power optimization via dual-Vth cell assignment and gate re-sizing. Scripting in TCL with custom commands written for Synopsys® PrimeTime® and DC Ultra™.

Typical project for Synopsys DC Compiler

Its Prime Time! | It is a game based on your knowledge about prime numbers. Let's see how much you know about prime numbers.

A small stupid program I wrote ages ago to find the prime numbers my military time clock shows.

An open-source tool for visualizing and analyzing timing paths extracted from Static Timing Analysis (STA) reports.

This project provides a TCL command for PrimeTime, enabling a straightforward implementation of a post-synthesis leakage power minimization procedure. Developed as part of a contest project for the course "Synthesis and Optimization of Digital Circuits" at Politecnico di Torino. This tool is designed to streamline power optimization efforts.