Skip to content

Commit

Permalink
Merge remote-tracking branch 'gitlab/nvdla_nv_small'
Browse files Browse the repository at this point in the history
  • Loading branch information
@jwise
jwise committed Jun 21, 2018
2 parents 1428251 + 2becf69 commit 771f20c
Show file tree
Hide file tree
Showing 64 changed files with 8,851 additions and 4,424 deletions.
6 changes: 3 additions & 3 deletions cmod/sdp/NV_NVDLA_sdp.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1026,7 +1026,7 @@ void NV_NVDLA_sdp::SdpDataOperationDC() {
if (NVDLA_SDP_D_FEATURE_MODE_CFG_0_OUTPUT_DST_MEM == sdp_output_dst_) {
int16_t *temp_ptr = new int16_t[SDP_PARALLEL_PROC_NUM];
cslAssert((temp_ptr != NULL));
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, ATOM_CUBE_SIZE);
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, SDP_PARALLEL_PROC_NUM*sizeof(int16_t));
// Output destination is memory
cslDebug((70, "NV_NVDLA_sdp::%s, DP->WDMA\n", __FUNCTION__));
for(int i=0;i<SDP_PARALLEL_PROC_NUM;i++) {
Expand Down Expand Up @@ -1183,7 +1183,7 @@ void NV_NVDLA_sdp::SdpDataOperationBatch() {
hls_y_alu_op_[y_idx][proc_iter], hls_y_mul_op_[y_idx][proc_iter]);
int16_t *temp_ptr = new int16_t[SDP_PARALLEL_PROC_NUM];
cslAssert((temp_ptr != NULL));
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, ATOM_CUBE_SIZE);
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, SDP_PARALLEL_PROC_NUM*sizeof(int16_t));
cslDebug((50, "before write wdma_fifo_\n"));
wdma_fifo_->write(temp_ptr); //8B
cslDebug((50, "after write wdma_fifo_\n"));
Expand Down Expand Up @@ -1303,7 +1303,7 @@ void NV_NVDLA_sdp::SdpDataOperationWG() {
} else {
int16_t *temp_ptr = new int16_t[SDP_PARALLEL_PROC_NUM];
cslAssert((temp_ptr != NULL));
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, ATOM_CUBE_SIZE);
memcpy(temp_ptr, sdp_hls_wrapper_.sdp_data_out, SDP_PARALLEL_PROC_NUM*sizeof(int16_t));
wdma_fifo_->write(temp_ptr); //8B
cslDebug((50, " write wdma_fifo_\n"));
}
Expand Down
1 change: 1 addition & 0 deletions tools/etc/build.config
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,7 @@ vmod_rams:
sandbox:
- vmod/rams/model
- vmod/rams/synth
- vmod/rams/fpga/small_rams
dependencies:
- defs

Expand Down
1,846 changes: 935 additions & 911 deletions verif/coverage/elfiles/nv_small_cacc_code.el
View file

Large diffs are not rendered by default.

98 changes: 70 additions & 28 deletions verif/coverage/elfiles/nv_small_cmac_code.el
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,48 +2,90 @@
// This file contains the Excluded objects
// Generated By User: ellenz
// Format Version: 2
// Date: Tue Apr 10 20:09:04 2018
// Date: Mon May 21 02:45:51 2018
// ExclMode: default
//==================================================
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0.p_clkgate
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0.p_clkgate
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0.p_clkgate
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0.p_clkgate
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_ma.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_0
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_6
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_5
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_4
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_3
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_2
CHECKSUM: "617721021"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_1
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_0.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_6.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_5.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_4.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_3.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_2.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_mb.u_NV_NVDLA_cmac.u_core.u_slcg_op_1.nvdla_core_clk_slcg_0
30 changes: 30 additions & 0 deletions verif/coverage/elfiles/nv_small_csc_code.el
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,3 +10,33 @@ INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_wl
Block 191 "2071161909" "wmb_req_addr <= wmb_req_addr_w;"
Block 197 "1572362044" "wmb_req_addr_last <= wmb_req_addr_w;"
Block 220 "1249590617" "sc2buf_wmb_rd_addr <= wmb_req_addr;"
CHECKSUM: "1941532982 3809241588"
INSTANCE: nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_regfile
Block 69 "0" "assign csb_rresp_pd_w[32] = csb_rresp_error;"
Block 70 "0" "assign csb_wresp_pd_w[31:0] = csb_wresp_rdat[31:0];"
Block 71 "0" "assign csb_wresp_pd_w[32] = csb_wresp_error;"
Block 76 "1949545652" "csc2csb_resp_pd <= csb_rresp_pd_w;"
CHECKSUM: "2285388798"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_0
CHECKSUM: "2285388798"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_wg
CHECKSUM: "2285388798"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_2
CHECKSUM: "2285388798"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_1
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_0.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_wg.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_2.nvdla_core_clk_slcg_0
CHECKSUM: "2332134184"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_1.nvdla_core_clk_slcg_0
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_0.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_wg.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_2.nvdla_core_clk_slcg_0.p_clkgate
CHECKSUM: "3496322456"
INSTANCE:nvdla_tb_top.DLA_DUT.u_partition_c.u_NV_NVDLA_csc.u_slcg_op_1.nvdla_core_clk_slcg_0.p_clkgate
Loading

2 comments on commit 771f20c

@jwise
Copy link
Contributor Author

@jwise jwise commented on 771f20c Mar 5, 2019

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

@peterzh2018 @peterzh2018888 I no longer work at NVIDIA, so I can't help with this.

I will note that you have been posting the same comment in many bugs. Please do not do this. Please only post one comment in one bug; it is not fair to other users, and it is not fair to developers who are trying to track each bug, and indeed, it will make developers less likely to answer your question. (There are many users who are subscribed to the entire repository, so when you copy and paste, one e-mail is sent for each time you copy-and-paste. Do not do that.)

@jwise
Copy link
Contributor Author

@jwise jwise commented on 771f20c Mar 5, 2019

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

It turns out that I still have moderator permissions. I have suspended this user's comment privileges. Apologies to affected folks.

Please sign in to comment.