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Add PLL to control clocks #607

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Commits on Jun 27, 2022

  1. Add PLL for clocks configuration

    Signed-off-by: Robert Szczepanski <[email protected]>
    robertszczepanski committed Jun 27, 2022
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  2. Add dynamic clock control betwen SoC and CFU

    Signed-off-by: Robert Szczepanski <[email protected]>
    robertszczepanski committed Jun 27, 2022
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  3. Import NXPLL from LiteX

    Signed-off-by: Robert Szczepanski <[email protected]>
    robertszczepanski committed Jun 27, 2022
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  4. Add clock enable signals for PLL output clocks

    Signed-off-by: Robert Szczepanski <[email protected]>
    robertszczepanski committed Jun 27, 2022
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  5. Connect PLL's clock enable to dynamic clock control logic

    Signed-off-by: Robert Szczepanski <[email protected]>
    robertszczepanski committed Jun 27, 2022
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