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89 Open 869 Closed
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Issues list

Detailed routing failed: Signal 6 received Stack trace
#2168 opened Nov 18, 2024 by Asma-Mohsin
Errors found by linter
#2162 opened Oct 22, 2024 by Thanhdat1301
8
Upgrade to rtl_macro_placer OpenLane 2 Scheduled for next gen OpenLane
#2158 opened Oct 2, 2024 by maliberty
3
Yosys Tool Crashing at "Executing ABC" with no errorcode question The user needs help waiting on op Information has been requested from the Issue Author
#2152 opened Sep 13, 2024 by krupatishbi
1
getting max capacitance and max slew violations at some corners while doing sta question The user needs help waiting on op Information has been requested from the Issue Author
#2144 opened Aug 2, 2024 by Sanchit-Gupta10
4
Version Mismatch and KeyError for 'magic' when Switching to GF180mcu invalid This doesn't seem right
#2143 opened Aug 1, 2024 by gowreddysuresh
3
Yosys ABC Tool crashes with exit code 139 blocked This issue is blocked on a bugfix or enhancement of another repository or tool bug Something isn't working Yosys This issue is related to yosys
#2124 opened May 22, 2024 by Fabbboy
7
Error: multi_corner.tcl line 43 waiting on op Information has been requested from the Issue Author
#2123 opened May 20, 2024 by fazliemre
3
Generating the PDN fails at the "Hierarchical chip design (with macros)" tutorial bug Something isn't working documentation Improvements or additions to documentation
#2121 opened May 7, 2024 by kietuan
Enable rtl_macro_placer feature enhancement New feature or request OpenLane 2 Scheduled for next gen OpenLane
#2117 opened Apr 12, 2024 by vijayank88
Unbalanced buffer insertion on high fanout designs question The user needs help
#2090 opened Feb 6, 2024 by Dolu1990
3
flow succeeds even if clock signal wire is unconnected / doesn't exist Yosys This issue is related to yosys
#2083 opened Jan 10, 2024 by mattvenn
4
Getting -from and -to are no longer supported OpenLane 2 Scheduled for next gen OpenLane
#2081 opened Jan 2, 2024 by ShankarSNP
2
ERROR]: Synthesis failed. Signal not matching port size. Search for 'Resizing cell port' waiting on op Information has been requested from the Issue Author
#2078 opened Dec 28, 2023 by alishan1213
1
[ERROR STA-0026] unterminated string constant blocked This issue is blocked on a bugfix or enhancement of another repository or tool bug Something isn't working OpenROAD An issue with an OpenROAD component
#2063 opened Dec 10, 2023 by thesourcerer8
2
Add a max capacitance variable enhancement New feature or request
#2057 opened Nov 21, 2023 by donn
Documentation Cleanup enhancement New feature or request
#2043 opened Nov 12, 2023 by donn
CURRENT_ODB is unset when follow Designing a chip with an OpenRAM (sky130) bug Something isn't working documentation Improvements or additions to documentation
#2032 opened Oct 30, 2023 by PeterBorisenko
3
Using Openlane for symmetric routing enhancement New feature or request
#2031 opened Oct 30, 2023 by jchin2
1
Metal Spacing violation between interconnect and macro (sky130) blocked This issue is blocked on a bugfix or enhancement of another repository or tool bug Something isn't working OpenROAD An issue with an OpenROAD component
#2030 opened Oct 30, 2023 by Dolu1990
9
Downloadable document documentation Improvements or additions to documentation enhancement New feature or request
#2016 opened Oct 11, 2023 by alwinshaju08
Move fetch_library_info to OpenLane backbone enhancement New feature or request
#2008 opened Oct 1, 2023 by kareefardi
Routing not respecting PR Boundary blocked This issue is blocked on a bugfix or enhancement of another repository or tool bug Something isn't working OpenROAD An issue with an OpenROAD component
#2006 opened Sep 27, 2023 by marwaneltoukhy
1
Placement Resizer optimization error with recently version of OpenLane bug Something isn't working
#1982 opened Sep 11, 2023 by Baungarten-CINVESTAV
11
Please add hooks for user scripts into openroad tcl files enhancement New feature or request OpenLane 2 Scheduled for next gen OpenLane
#1964 opened Sep 1, 2023 by chaufe
1
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