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ERROR]: Synthesis failed. Signal not matching port size. Search for 'Resizing cell port' #2078

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alishan1213 opened this issue Dec 28, 2023 · 1 comment
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waiting on op Information has been requested from the Issue Author

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@alishan1213
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Description

Can any one guide me how to fix that error?

[STEP 1]
[INFO]: Running Synthesis (log: designs/vex_soc/runs/run1/logs/synthesis/1-synthesis.log)...
[ERROR]: Synthesis failed. Signal not matching port size. Search for 'Resizing cell port' in 'designs/vex_soc/runs/run1/logs/synthesis/1-synthesis.log'
[ERROR]: Step 1 (synthesis) failed with error:
-code 1 -level 0 -errorcode NONE -errorinfo {
while executing
"throw_error"
(procedure "check_resizing_cell_port" line 7)
invoked from within
"check_resizing_cell_port $log"
(procedure "run_synthesis_checkers" line 4)
invoked from within
"run_synthesis_checkers $log $pre_synth_report"
(procedure "run_synthesis" line 19)
invoked from within
"run_synthesis"} -errorline 1

Expected Behavior

[ERROR]: Synthesis failed. Signal not matching port size. Search for 'Resizing cell port' in 'designs/vex_soc/runs/run1/logs/synthesis/1-synthesis.log'

Environment report

[ERROR]: Synthesis failed. Signal not matching port size. Search for 'Resizing cell port' in 'designs/vex_soc/runs/run1/logs/synthesis/1-synthesis.log'

Reproduction material

[ERROR]: Synthesis failed. Signal not matching port size. Search for 'Resizing cell port' in 'designs/vex_soc/runs/run1/logs/synthesis/1-synthesis.log'

Relevant log output

[ERROR]: Synthesis failed. Signal not matching port size. Search for 'Resizing cell port' in 'designs/vex_soc/runs/run1/logs/synthesis/1-synthesis.log'
@kareefardi
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The log file will reference signal that is being resized. You should update your RTL accordingly.

@kareefardi kareefardi added the waiting on op Information has been requested from the Issue Author label Jan 30, 2024
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