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boards: mps3: Add support for corstone310/an555
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What is changed?
 - Added a new mps3 board an555 for the soc corstone310.
   The qualifier to build/run application with board mps3/an555 is
   `mps3/corstone310/an555` for secure and
   `mps3/corstone310/an555/ns` for non-secure.
 - Added FVP variant to enable FVP testing with corstone310
   and it uses the ARM FVP `FVP_Corstone_SSE-310`.
   The qualifier to build/run application with FVP is
   `mps3/corstone310/an555fvp` for secure and
   `mps3/corstone310/an555fvp/ns` for non-secure.

Why do we need this change?
 - This enables FVP support and testing for corstone310.
 - A separate FVP variant was added for AN555 because, the TFM board
   used for non-secure variant differs for FPGA and FVP.
   TFM board `arm/mps3/corstone310/an555` should be used when testing
   AN555 with FVP and `arm/mps3/corstone310/fvp` should be used when
   testing with AN555 FPGA.

Signed-off-by: Sudan Landge <[email protected]>
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wearyzen committed Oct 15, 2024
1 parent 722bff9 commit 81f361e
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2 changes: 1 addition & 1 deletion boards/arm/mps3/Kconfig.defconfig
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Expand Up @@ -2,7 +2,7 @@
# Copyright 2024 Arm Limited and/or its affiliates <[email protected]>
# SPDX-License-Identifier: Apache-2.0

if BOARD_MPS3_CORSTONE300_AN547 || BOARD_MPS3_CORSTONE300_AN552 || BOARD_MPS3_CORSTONE300_FVP
if BOARD_MPS3_CORSTONE300_AN547 || BOARD_MPS3_CORSTONE300_AN552 || BOARD_MPS3_CORSTONE300_FVP || BOARD_MPS3_CORSTONE310_AN555 || BOARD_MPS3_CORSTONE310_FVP

# MPU-based null-pointer dereferencing detection cannot
# be applied as the (0x0 - 0x400) is unmapped but QEMU
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4 changes: 4 additions & 0 deletions boards/arm/mps3/Kconfig.mps3
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Expand Up @@ -11,3 +11,7 @@ config BOARD_MPS3
BOARD_MPS3_CORSTONE300_AN552_NS || \
BOARD_MPS3_CORSTONE300_FVP || \
BOARD_MPS3_CORSTONE300_FVP_NS
select SOC_MPS3_CORSTONE310 if BOARD_MPS3_CORSTONE310_AN555 || \
BOARD_MPS3_CORSTONE310_AN555_NS || \
BOARD_MPS3_CORSTONE310_FVP || \
BOARD_MPS3_CORSTONE310_FVP_NS
10 changes: 10 additions & 0 deletions boards/arm/mps3/board.cmake
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Expand Up @@ -8,6 +8,7 @@
# Default emulation:
# QEMU is used by default for corstone300/an547 and
# FVP is used by default for corstone300/fvp.
# FVP is used by default for corstone310/fvp.
#


Expand All @@ -29,6 +30,15 @@ elseif(CONFIG_BOARD_MPS3_CORSTONE300)
string(REPLACE "mps3/corstone300;" "" board_targets "${board_targets}")
string(REPLACE ";" "\n" board_targets "${board_targets}")
message(FATAL_ERROR "Please use a target from the list below: \n${board_targets}\n")
elseif(CONFIG_BOARD_MPS3_CORSTONE310_FVP OR CONFIG_BOARD_MPS3_CORSTONE310_FVP_NS)
set(SUPPORTED_EMU_PLATFORMS armfvp)
set(ARMFVP_BIN_NAME FVP_Corstone_SSE-310)
if(CONFIG_BOARD_MPS3_CORSTONE310_FVP)
set(ARMFVP_FLAGS
# default is '0x11000000' but should match cpu<i>.INITSVTOR which is 0.
-C mps3_board.sse300.iotss3_systemcontrol.INITSVTOR_RST=0
)
endif()
endif()

board_set_debugger_ifnset(qemu)
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8 changes: 8 additions & 0 deletions boards/arm/mps3/board.yml
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Expand Up @@ -13,3 +13,11 @@ board:
- name: 'fvp'
variants:
- name: 'ns'
- name: 'corstone310'
variants:
- name: 'an555'
variants:
- name: 'ns'
- name: 'fvp'
variants:
- name: 'ns'
83 changes: 81 additions & 2 deletions boards/arm/mps3/doc/index.rst
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Expand Up @@ -15,12 +15,13 @@ on the MPS3 board. It provides support for the following devices:
- Cortex-M System Design Kit UART
- Ethos-U55 NPU
- AN547 and AN552 support Arm Cortex-M55 CPU
- AN555 support Arm Cortex-M85 CPU

.. image:: img/mps3.jpg
:align: center
:alt: ARM MPS3

`Corstone-300 FVP`_ (Fixed Virtual Platforms) is a complete
`Corstone-300 FVP`_/`Corstone-310 FVP`_ (Fixed Virtual Platforms) is a complete
simulations of the Arm system, including processor, memory and peripherals.
They are available free of charge for Linux and Windows systems.
The FVPs have been selected for simulation since they provide access to the
Expand Down Expand Up @@ -99,6 +100,9 @@ Zephyr board options
| ``mps3/corstone300/fvp/ns`` | For building Non-Secure firmware |
+-------------------------------+-----------------------------------------------+

FPGA Usage:
- N/A.

FVP Usage:
- To run with the FVP, first set environment variable ``ARMFVP_BIN_PATH`` before using it. Then you can run it with ``west build -t run``.

Expand All @@ -111,12 +115,69 @@ Zephyr board options
for the Corstone-300 MPS3" from Arm and install it on your host PC. This board
has been tested with version 11.24.13 (Jan 4 2024).

QEMU Usage:
- N/A.

.. tab:: MPS3 Corstone-310 (AN555)

The MPS3+ AN555 is an SoC with Cortex-M85 architecture. Zephyr provides support
for building for both Secure and Non-Secure firmware.

The BOARD options are summarized below:

+-------------------------------+-----------------------------------------------+
| BOARD | Description |
+===============================+===============================================+
| ``mps3/corstone310/an555`` | For building Secure (or Secure-only) firmware |
+-------------------------------+-----------------------------------------------+
| ``mps3/corstone310/an555/ns`` | For building Non-Secure firmware |
+-------------------------------+-----------------------------------------------+

FPGA Usage:
- Follow `Programming and Debugging`_ for build and flash instructions.

FVP Usage:
- FVP not supported for this variant.

QEMU Usage:
- QEMU not supported for this variant of board.

.. tab:: MPS3 Corstone-310 (FVP)

The MPS3+ FVP is an SoC with Cortex-M85 architecture. Zephyr provides support
for building for both Secure and Non-Secure firmware.

The BOARD options are summarized below:

+-------------------------------+-----------------------------------------------+
| BOARD | Description |
+===============================+===============================================+
| ``mps3/corstone310/fvp`` | For building Secure (or Secure-only) firmware |
+-------------------------------+-----------------------------------------------+
| ``mps3/corstone310/fvp/ns`` | For building Non-Secure firmware |
+-------------------------------+-----------------------------------------------+

FPGA Usage:
- N/A.

FVP Usage:
- To run with the FVP, first set environment variable ``ARMFVP_BIN_PATH`` before using it. Then you can run it with ``west build -t run``.

.. code-block:: bash
export ARMFVP_BIN_PATH=/path/to/fvp/directory
west build -b {BOARD qualifier from table above} samples/hello_world -t run
To run the Fixed Virtual Platform simulation tool you must download "FVP model
for the Corstone-310 MPS3" from Arm and install it on your host PC. This board
has been tested with version 11.24.13 (Jan 4 2024).

QEMU Usage:
- N/A.

.. note::
Board qualifier must include the board name as mentioned above.
``mps3/corstone300`` without the board name is not a valid qualifier.
``mps3/corstone300`` or ``mps3/corstone310`` without the board name is not a valid qualifier.

Hardware
********
Expand All @@ -127,6 +188,8 @@ ARM MPS3 provides the following hardware components:

- AN547 and AN552 support Arm Cortex-M55 CPU and
Soft Macro Model (SMM) implementation of SSE-300 subsystem
- AN555 support Arm Cortex-M85 CPU and
Soft Macro Model (SMM) implementation of SSE-310 subsystem

- Memory

Expand Down Expand Up @@ -184,6 +247,7 @@ The default configuration can be found in
- For AN547: :zephyr_file:`boards/arm/mps3/mps3_corstone300_an547_defconfig`.
- For AN552: :zephyr_file:`boards/arm/mps3/mps3_corstone300_an552_defconfig`.
- For FVP : :zephyr_file:`boards/arm/mps3/mps3_corstone300_fvp_defconfig`.
- For AN555: :zephyr_file:`boards/arm/mps3/mps3_corstone310_an555_defconfig`.


Serial Port
Expand Down Expand Up @@ -278,13 +342,19 @@ serial port:
For more details refer to:
- `MPS3 AN547 Technical Reference Manual (TRM)`_
- `MPS3 AN552 Technical Reference Manual (TRM)`_
- `MPS3 AN555 Technical Reference Manual (TRM)`_
- `MPS3 FPGA Prototyping Board Technical Reference Manual (TRM)`_
- `Cortex M55 Generic User Guide`_
- `Cortex M85 Generic User Guide`_
- `Corelink SSE-300 Example Subsystem`_
- `Corelink SSE-310 Example Subsystem`_
.. _Corstone-300 FVP:
https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
.. _Corstone-310 FVP:
https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
.. _MPS3 FPGA Website:
https://developer.arm.com/tools-and-software/development-boards/fpga-prototyping-boards/mps3
Expand All @@ -294,11 +364,20 @@ For more details refer to:
.. _MPS3 AN552 Technical Reference Manual (TRM):
https://developer.arm.com/documentation/dai0552/latest
.. _MPS3 AN555 Technical Reference Manual (TRM):
https://developer.arm.com/documentation/107642/latest
.. _MPS3 FPGA Prototyping Board Technical Reference Manual (TRM):
https://developer.arm.com/documentation/100765/latest
.. _Cortex M55 Generic User Guide:
https://developer.arm.com/documentation/101051/latest
.. _Cortex M85 Generic User Guide:
https://developer.arm.com/documentation/101924/latest
.. _Corelink SSE-300 Example Subsystem:
https://developer.arm.com/documentation/101772/latest
.. _Corelink SSE-310 Example Subsystem:
https://developer.arm.com/documentation/102778/latest
96 changes: 96 additions & 0 deletions boards/arm/mps3/mps3_corstone310_an555.dts
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@@ -0,0 +1,96 @@
/*
* Copyright 2024 Arm Limited and/or its affiliates <[email protected]>
*
* SPDX-License-Identifier: Apache-2.0
*/

/dts-v1/;

#include <arm/armv8.1-m.dtsi>
#include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <mem.h>
#include "mps3_common.dtsi"

/ {
compatible = "arm,mps3-an555";
#address-cells = <1>;
#size-cells = <1>;

chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &dtcm;
zephyr,flash = &itcm;
};

cpus {
#address-cells = <1>;
#size-cells = <0>;

cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m85";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;

mpu: mpu@e000ed90 {
compatible = "arm,armv8.1m-mpu";
reg = <0xe000ed90 0x40>;
};
};
};

ethosu {
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&nvic>;

ethosu0: ethosu@50004000 {
compatible = "arm,ethos-u";
reg = <0x50004000>;
interrupts = <16 3>;
secure-enable;
privilege-enable;
status = "okay";
};
};

/* We utilize the secure addresses, if you subtract 0x10000000
* you'll get the non-secure alias
*/
itcm: itcm@10000000 { /* alias @ 0x0 */
compatible = "zephyr,memory-region";
reg = <0x10000000 DT_SIZE_K(32)>;
zephyr,memory-region = "ITCM";
};

sram: sram@11000000 { /* alias @ 0x01000000 */
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x11000000 DT_SIZE_M(2)>;
zephyr,memory-region = "SRAM";
};

dtcm: dtcm@30000000 { /* alias @ 0x20000000 */
compatible = "zephyr,memory-region";
reg = <0x30000000 DT_SIZE_K(32)>;
zephyr,memory-region = "DTCM";
};

isram: sram@31000000 {/* alias @ 0x21000000 */
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x31000000 DT_SIZE_M(4)>;
zephyr,memory-region = "ISRAM";
};

soc {
peripheral@50000000 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x50000000 0x10000000>;

#include "mps3_common_soc_peripheral.dtsi"
};
};
};
24 changes: 24 additions & 0 deletions boards/arm/mps3/mps3_corstone310_an555.yaml
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@@ -0,0 +1,24 @@
# Copyright 2024 Arm Limited and/or its affiliates <[email protected]>
# SPDX-License-Identifier: Apache-2.0

identifier: mps3/corstone310/an555
name: Arm MPS3-AN555
type: mcu
arch: arm
ram: 32
flash: 32
simulation: armfvp
simulation_exec: FVP_Corstone_SSE-310
toolchain:
- gnuarmemb
- zephyr
- xtools
supported:
- gpio
testing:
ignore_tags:
- drivers
- bluetooth
- net
- timer
vendor: arm
17 changes: 17 additions & 0 deletions boards/arm/mps3/mps3_corstone310_an555_defconfig
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@@ -0,0 +1,17 @@
# Copyright 2024 Arm Limited and/or its affiliates <[email protected]>
# SPDX-License-Identifier: Apache-2.0

CONFIG_RUNTIME_NMI=y
CONFIG_ARM_TRUSTZONE_M=y
CONFIG_ARM_MPU=y

# GPIOs
CONFIG_GPIO=y

# Serial
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y

# Build a Secure firmware image
CONFIG_TRUSTED_EXECUTION_SECURE=y
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