VirtualToPhysical32 is moved to Mmu class.

yuppox · May 10, 2020 · 6378cff · 6378cff
1 parent 5ac0384
commit 6378cff
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Showing 6 changed files with 47 additions and 12 deletions.
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -32,7 +32,11 @@ add_executable(cpu_test
         cpu_test.cc
         RISCV_cpu.cc
         RISCV_cpu.h
-        memory_wrapper.cpp memory_wrapper.h system_call_emulator.cpp system_call_emulator.h pte.cpp pte.h)
+        memory_wrapper.cpp memory_wrapper.h
+        system_call_emulator.cpp system_call_emulator.h
+        pte.cpp pte.h
+        Mmu.cpp Mmu.h
+        riscv_cpu_common.h)
 
 add_executable(RISCV_Emulator
         assembler.cc
@@ -47,13 +51,19 @@ add_executable(RISCV_Emulator
         RISCV_cpu.h
         RISCV_Emulator.cc
         RISCV_Emulator.h
-        memory_wrapper.cpp memory_wrapper.h system_call_emulator.cpp system_call_emulator.h pte.cpp pte.h)
+        memory_wrapper.cpp
+        memory_wrapper.h
+        system_call_emulator.cpp
+        system_call_emulator.h
+        pte.cpp pte.h
+        Mmu.cpp Mmu.h
+        riscv_cpu_common.h)
 
 add_executable(memory_wrapper_test
         memory_wrapper.cpp
         memory_wrapper.h
         memory_wrapper_test.cpp
-)
+        )
 
 add_executable(pte_test
         pte.cpp

diff --git a/Makefile b/Makefile
@@ -1,7 +1,8 @@
 CXX	= g++
 CPPFLAGS = -Wall -g
 TARGET = RISCV_Emulator
-CPU_OBJS = RISCV_cpu.o load_assembler.o assembler.o bit_tools.o instruction_encdec.o memory_wrapper.o system_call_emulator.o pte.o
+CPU_OBJS = RISCV_cpu.o load_assembler.o assembler.o bit_tools.o \
+instruction_encdec.o memory_wrapper.o system_call_emulator.o pte.o Mmu.o
 OBJS = RISCV_Emulator.o $(CPU_OBJS)
 TEST_TARGETS = cpu_test pte_test
 WRAPPER_TESTS = memory_wrapper_test load_assembler_test

diff --git a/RISCV_cpu.cc b/RISCV_cpu.cc
@@ -4,6 +4,7 @@
 #include "memory_wrapper.h"
 #include "system_call_emulator.h"
 #include "pte.h"
+#include "Mmu.h"
 #include <iostream>
 #include <tuple>
 #include <stdint.h>
@@ -45,7 +46,14 @@ RiscvCpu::VirtualToPhysical(uint64_t virtual_address, bool write_access) {
     return virtual_address;
   }
   if (xlen_ == 32) {
-    return VirtualToPhysical32(virtual_address, write_access);
+    Mmu mmu;
+    mmu.memory_ = memory_;
+    mmu.page_fault_ = page_fault_;
+    mmu.faulting_address_ = faulting_address_;
+    uint64_t physical_address = VirtualToPhysical32(virtual_address, write_access);
+    page_fault_ = page_fault_;
+    faulting_address_ = faulting_address_;
+    return physical_address;
   } else {
     // if (xlen == 64) {
     return VirtualToPhysical64(virtual_address, write_access);

diff --git a/RISCV_cpu.h b/RISCV_cpu.h
@@ -5,16 +5,10 @@
 #include <utility>
 #include <vector>
 #include <memory>
+#include "riscv_cpu_common.h"
 #include "bit_tools.h"
 #include "memory_wrapper.h"
 
-enum class PrivilegeMode {
-  USER_MODE = 0,
-  SUPERVISOR_MODE = 1,
-  MACHINE_MODE = 3
-};
-
-
 class RiscvCpu {
   static constexpr int kCsrSize = 4096;
   static constexpr int kRegSize = 32;

diff --git a/RiscvCpuCommon.h b/RiscvCpuCommon.h
@@ -0,0 +1,8 @@
+//
+// Created by moiz on 5/10/20.
+//
+
+#ifndef ASSEMBLER_TEST_RISCVCPUCOMMON_H
+#define ASSEMBLER_TEST_RISCVCPUCOMMON_H
+
+#endif //ASSEMBLER_TEST_RISCVCPUCOMMON_H
diff --git a/riscv_cpu_common.h b/riscv_cpu_common.h
@@ -0,0 +1,14 @@
+//
+// Created by moiz on 5/10/20.
+//
+
+#ifndef RISCV_CPU_RISCV_CPU_COMMON_H
+#define RISCV_CPU_RISCV_CPU_COMMON_H
+
+enum class PrivilegeMode {
+  USER_MODE = 0,
+  SUPERVISOR_MODE = 1,
+  MACHINE_MODE = 3
+};
+
+#endif //RISCV_CPU_RISCV_CPU_COMMON_H