systemverilog
Here are 897 public repositories matching this topic...
Basic Stopwatch Design using Terasic DE-10 Standard FPGA
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Jul 30, 2022 - SystemVerilog
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Oct 1, 2023 - SystemVerilog
Here you'll find the game "Donkey Kong" written 100% in SysVerilog. You'll need an FPGA card, a screen, a keyboard, and audio devices for the full functionality.
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Apr 16, 2023 - SystemVerilog
Extending the MIPS32 Single Cycle Processor Instruction Set.
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Apr 11, 2023 - C
A single SystemVerilog package with both classes of half as well as full adder is created and tested using the testbench
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Oct 13, 2023 - SystemVerilog
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May 19, 2024 - SystemVerilog
A tool for the creation of JasperGold SVP principle tcl files.
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Apr 23, 2024 - Python
Examples of SystemC from the High-Level Systems Design course of the Master's Degree in Electronics at the Costa Rica Institute of Technology.
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Jun 21, 2024 - C++
A Pokemon-style RPG built for the Altera FPGA DE2-115 Development Board for ECE 385
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Apr 22, 2018 - Verilog
Screen Saver for linux system with a ball bouncing
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Mar 26, 2024 - C
Example to test all UPduino GPIO outputs
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Nov 24, 2022 - SystemVerilog
SoC approach on StarCraft inspired Top-down PvP Shooter Game with an FPGA
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Apr 7, 2023 - Verilog
This repository contains an extensive learning journey of SystemVerilog, exercises and projects to enhance the understanding and proficiency in the hardware description language
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Apr 11, 2024 - SystemVerilog
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