Generative AI/LLMs Architect at NVIDIA. CS/Robotics at Carnegie Mellon and EE at IIT Madras.
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NVIDIA
- Mountain View, California
- http://www.wowelec.wordpress.com
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systolic-array-sorting
systolic-array-sorting PublicImplementation of a Systolic Array based sorting engine on an FPGA using Verilog
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EE5175_ImageSignalProcessing
EE5175_ImageSignalProcessing PublicImage Signal Processing Assignments
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N-Body-Simulations-CUDA
N-Body-Simulations-CUDA PublicN-Body Particle Simulations on GPU using CUDA
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