Fixes for CI

tensorflow · Sep 11, 2023 · a3a7b7f · a3a7b7f
1 parent 80c9a38
commit a3a7b7f
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Showing 6 changed files with 20 additions and 15 deletions.
diff --git a/codegen/preprocessor/main.cc b/codegen/preprocessor/main.cc
@@ -34,7 +34,7 @@ std::unique_ptr<char[]> ReadModelFile(const char* model_file_name) {
 
   model_file.seekg(0, std::ios::end);
   size_t num_bytes = model_file.tellg();
-  model_file.seekg(0,std::ios::beg);
+  model_file.seekg(0, std::ios::beg);
   std::unique_ptr<char[]> model_data(new char[num_bytes]);
   model_file.read(model_data.get(), num_bytes);
 

diff --git a/tensorflow/lite/micro/tools/make/helper_functions.inc b/tensorflow/lite/micro/tools/make/helper_functions.inc
@@ -127,21 +127,22 @@ recursive_find = $(wildcard $(1)$(2)) $(foreach dir,$(wildcard $(1)*),$(call rec
 # Calling eval on the output will create the targets that you need.
 define codegen_model
 
-$(1)_MODEL := $(abspath $(3))
-$(1)_PREPROCESSOR_OUTPUT := $(abspath $(GENERATED_SRCS_DIR)/$(2).ppd)
-$(1)_GENERATED_SRC_DIR := $(abspath $(GENERATED_SRCS_DIR))
+$(1)_MODEL := $(3)
+$(1)_PREPROCESSOR_OUTPUT := $(GENERATED_SRCS_DIR)/$(2).ppd
 
-$(1)_GENERATED_SRCS := $$($(1)_GENERATED_SRC_DIR)/$(2).cc
-$(1)_GENERATED_HDRS := $$($(1)_GENERATED_SRC_DIR)/$(2).h
+$(1)_GENERATED_SRCS := $(GENERATED_SRCS_DIR)$(2).cc
+$(1)_GENERATED_HDRS := $(GENERATED_SRCS_DIR)$(2).h
 
 $$($(1)_PREPROCESSOR_OUTPUT): $(CODEGEN_PREPROCESSOR_PATH) $$($(1)_MODEL)
 	@mkdir -p $$(dir $$@)
-	$$(TEST_SCRIPT) $(CODEGEN_PREPROCESSOR_PATH) $$($(1)_MODEL) $$($(1)_PREPROCESSOR_OUTPUT)
+	$$(RUN_COMMAND) $(CODEGEN_PREPROCESSOR_PATH) \
+	$(abspath $$($(1)_MODEL)) $(abspath $$($(1)_PREPROCESSOR_OUTPUT))
 
 $$($(1)_GENERATED_SRCS) $$($(1)_GENERATED_HDRS): $$($(1)_MODEL) $$($(1)_PREPROCESSOR_OUTPUT)
-	bazel run //codegen:code_generator -- \
-        --model $$($(1)_MODEL) --preprocessed_data $$($(1)_PREPROCESSOR_OUTPUT) \
-        --output_dir $$($(1)_GENERATED_SRC_DIR) --output_name $(2)
+	cd $(TENSORFLOW_ROOT) && bazel run //codegen:code_generator -- \
+	--model $(abspath $$($(1)_MODEL)) \
+	--preprocessed_data $(abspath $$($(1)_PREPROCESSOR_OUTPUT)) \
+	--output_dir $(abspath $(GENERATED_SRCS_DIR)) --output_name $(2)
 
 $(1): $$($(1)_GENERATED_SRCS) $$($(1)_GENERATED_HDRS)
 
@@ -159,14 +160,14 @@ endef # codegen_model
 # Calling eval on the output will create the targets that you need.
 define codegen_model_binary
 
-$(1)_LOCAL_SRCS := $(4)
-$(1)_LOCAL_HDRS := $(5)
+$(1)_CODEGEN_SRCS := $(4)
+$(1)_CODEGEN_HDRS := $(5)
 
 $(call codegen_model,$(1)_codegen,$(2),$(3))
 
-$(1)_LOCAL_SRCS += $$($(1)_codegen_GENERATED_SRCS)
-$(1)_LOCAL_HDRS += $$($(1)_codegen_GENERATED_HDRS)
+$(1)_CODEGEN_SRCS += $$($(1)_codegen_GENERATED_SRCS)
+$(1)_CODEGEN_HDRS += $$($(1)_codegen_GENERATED_HDRS)
 
-$(call microlite_test,$(1),$$($(1)_LOCAL_SRCS),$$($(1)_LOCAL_HDRS),,)
+$(call microlite_test,$(1),$$($(1)_CODEGEN_SRCS),$$($(1)_CODEGEN_HDRS),,)
 
 endef # codegen_model_binary
diff --git a/tensorflow/lite/micro/tools/make/targets/cortex_m_qemu_makefile.inc b/tensorflow/lite/micro/tools/make/targets/cortex_m_qemu_makefile.inc
@@ -44,3 +44,4 @@ EXCLUDED_TESTS := \
 MICROLITE_TEST_SRCS := $(filter-out $(EXCLUDED_TESTS), $(MICROLITE_TEST_SRCS))
 
 TEST_SCRIPT := $(TENSORFLOW_ROOT)tensorflow/lite/micro/testing/test_with_qemu.sh arm $(TARGET_ARCH)
+RUN_COMMAND := qemu-arm -cpu $(TARGET_ARCH)
diff --git a/tensorflow/lite/micro/tools/make/targets/hexagon_makefile.inc b/tensorflow/lite/micro/tools/make/targets/hexagon_makefile.inc
@@ -114,3 +114,4 @@ MICROLITE_TEST_SRCS := $(filter-out $(EXCLUDED_TESTS), $(MICROLITE_TEST_SRCS))
 
 TEST_SCRIPT := $(TENSORFLOW_ROOT)tensorflow/lite/micro/testing/test_hexagon_binary.sh
 SIZE_SCRIPT := $(TENSORFLOW_ROOT)tensorflow/lite/micro/testing/size_hexagon_binary.sh
+RUN_COMMAND := hexagon-sim
diff --git a/tensorflow/lite/micro/tools/make/targets/riscv32_generic_makefile.inc b/tensorflow/lite/micro/tools/make/targets/riscv32_generic_makefile.inc
@@ -45,4 +45,5 @@ MICROLITE_TEST_SRCS := $(filter-out $(EXCLUDED_TESTS), $(MICROLITE_TEST_SRCS))
 LDFLAGS += -mno-relax
 TEST_SCRIPT := $(TENSORFLOW_ROOT)tensorflow/lite/micro/testing/test_with_qemu.sh riscv32 rv32
 SIZE_SCRIPT := ${TENSORFLOW_ROOT}tensorflow/lite/micro/testing/size_riscv32_binary.sh
+RUN_COMMAND := qemu-riscv32 -cpu rv32
 
diff --git a/tensorflow/lite/micro/tools/make/targets/xtensa_makefile.inc b/tensorflow/lite/micro/tools/make/targets/xtensa_makefile.inc
@@ -72,6 +72,7 @@ CXXFLAGS += $(XTENSA_EXTRA_CFLAGS)
 
 TEST_SCRIPT := $(TENSORFLOW_ROOT)tensorflow/lite/micro/testing/test_xtensa_binary.sh
 SIZE_SCRIPT := $(TENSORFLOW_ROOT)tensorflow/lite/micro/testing/size_xtensa_binary.sh
+RUN_COMMAND := xt-run
 
 # TODO(b/158651472): Fix the memory_arena_threshold_test
 # TODO(b/174707181): Fix the micro_interpreter_test
Original file line number	Diff line number	Diff line change
Expand Up		@@ -44,3 +44,4 @@ EXCLUDED_TESTS := \
		MICROLITE_TEST_SRCS := $(filter-out $(EXCLUDED_TESTS), $(MICROLITE_TEST_SRCS))

		TEST_SCRIPT := $(TENSORFLOW_ROOT)tensorflow/lite/micro/testing/test_with_qemu.sh arm $(TARGET_ARCH)
		RUN_COMMAND := qemu-arm -cpu $(TARGET_ARCH)
Original file line number	Diff line number	Diff line change
Expand Up		@@ -114,3 +114,4 @@ MICROLITE_TEST_SRCS := $(filter-out $(EXCLUDED_TESTS), $(MICROLITE_TEST_SRCS))

		TEST_SCRIPT := $(TENSORFLOW_ROOT)tensorflow/lite/micro/testing/test_hexagon_binary.sh
		SIZE_SCRIPT := $(TENSORFLOW_ROOT)tensorflow/lite/micro/testing/size_hexagon_binary.sh
		RUN_COMMAND := hexagon-sim