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增加25k英文翻译
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264 changes: 264 additions & 0 deletions docs/hardware/en/tang/tang-mega-138k/mega-138k.md
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---
title: Tang Mega 138K Pro Dock
keywords: FPGA, Tang, Mega, 138K
update:
- date: 2023-08-29
version: v
author: wonder
content:
- 新建文档
---

- Product Overview

Tang Mega 138K uses a 22nm process GW5AST-LV138FPG676A FPGA chip, which has 138,240 lookup table units and nearly 300 DSP units. It contains eight high-speed transceivers with a speed range of 270Mbps ~ 12.5Gbps, suitable for transmitting data through high-speed ports such as fiber optics or PCIE. In addition, the chip contains a hard-core PCIE, which consumes better resources when using PCIE and achieves better performance. It is suitable for high-speed communication, protocol conversion, high-performance computing, and other occasions.

Taobao purchase link: [Click me](https://item.taobao.com/item.htm?id=740536508140)

## Board Features

- Large capacity LUT
- Large capacity memory
- PCIE3.0 x 4
- SFP+ x 2
- RISCV hard core

## Product Appearance

<img src="./assets/mega_138k_top.png" width="45%">

## Hardware Parameters

### Core Board Parameters

<table>
<thead>
<tr>
<th style="text-align:center">Item</th>
<th style="text-align:center">Parameter</th>
<th style="text-align:center">Supplement</th>
</tr>
</thead>
<tbody>
<tr>
<td style="text-align:left">FPGA Chip</td>
<td style="text-align:left"><a href="http://www.gowinsemi.com.cn/prod_view.aspx?TypeId=10&amp;FId=t3:10:3&amp;Id=167#GW2A">GW5AST-LV138FPG676A</a>
</td>
<td style="text-align:left">
<table>
<tr>
<td>Logic Unit (LUT4)</td>
<td>138240</td>
</tr>
<tr>
<td>Register (FF)</td>
<td>138240</td>
</tr>
<tr>
<td>Distributed SRAM (S-SRAM) (Kbits)</td>
<td>1080</td>
</tr>
<tr>
<td>Block SRAM (B-SRAM) (Kbits)</td>
<td>6120</td>
</tr>
<tr>
<td>Number of Block SRAMs (B-SRAM) (pcs)</td>
<td>340</td>
</tr>
<tr>
<td>Multiplier (18x18 Multiplier)</td>
<td>298</td>
</tr>
<tr>
<td>Phase-Locked Loop (PLLs)</td>
<td>12</td>
</tr>
<tr>
<td>Global Clock</td>
<td>16</td>
</tr>
<tr>
<td>High-Speed Clock</td>
<td>24</td>
</tr>
<tr>
<td>Transceivers</td>
<td>8</td>
</tr>
<tr>
<td>Transceivers Rate</td>
<td>270Mbps-12.5Gbps</td>
</tr>
<tr>
<td>PCIE Hard Core</td>
<td>1<br>Speed optional x1, x2, x4, x8 PCIe 2.0</td>
</tr>
<tr>
<td>LVDS (Gbps)</td>
<td>1.25</td>
</tr>
<tr>
<td>DDR3 (Mbps)</td>
<td>1,333</td>
</tr>
<tr>
<td>MIPI D-PHY Hard Core</td>
<td>2.5Gbps (RX),<br>8 data channels,<br>2 clock channels</td>
</tr>
<tr>
<td>Hard Core Processor</td>
<td>RiscV AE350_SOC</td>
</tr>
<tr>
<td>ADC</td>
<td>2</td>
</tr>
<tr>
<td>Total I/O Bank</td>
<td>10</td>
</tr>
</table>
</td>
</tr>
<tr>
<td style="text-align:left">Memory</td>
<td style="text-align:left">1GB DDR3</td>
<td style="text-align:left">512MB x 2</td>
</tr>
<tr>
<td style="text-align:left">Flash</td>
<td style="text-align:left">128Mbits Flash x 2</td>
<td style="text-align:left">See <a href="#burn_flash">How to Burn to Flash</a></td>
</tr>
<tr>
<td style="text-align:left">Debug Interface</td>
<td style="text-align:left">Jtag + Uart</td>
<td style="text-align:left">JST SH1.0 8Pins Connector</td>
</tr>
<tr>
<td style="text-align:left">Overall Package</td>
<td style="text-align:left">50mm x 70mm Size</td>
<td style="text-align:left">BTB Connector Connects the Core Board and the Base Board</td>
</tr>
</tbody>
</table>

### Baseboard Parameters

| Item | Quantity | Remarks |
| :------------------ | -------- | ------------------------------------------------- |
| LED | 6 | |
| WS2812 | 1 | |
| Button | 4 | |
| PCIE | 1 | |
| SFP+ | 2 | |
| Gigabit Ethernet | 1 | |
| DVI RX | 2 | Mutually occupied with DVI TX |
| DVI TX | 2 | Mutually occupied with DVI RX |
| PMOD | 3 | |
| ADC | 2 | |
| MIPI CSI | 2 | 3 LANE MIPI CSI |
| ARGB | 1 | Same data pin with WS2812 |
| DVP Interface | 1 | |
| RGB Interface | 1 | Supports RGB888 screen |
| MIC ARRAY Interface | 1 | Supports connecting Sipeed 6+1 microphone array |
| SD Card Slot | 1 | |
| EEPROM | 1 | Can store necessary information |
| M.2 Socket | 1 | Reserved, can write peripheral driver yourself |
| PWM Fan Interface | 1 | |
| Speaker Interface | 1 | |
| 3.5mm Headphone Jack| 1 | |
| Custom USB | 1 | Cannot power the board |
| MS5351 | 2 | Provides RefClk for Serdes; control output via onboard UART |
| USB JTAG&UART | 1 | Supports FPGA programming and provides UART function |
| 40P Pin Header | 1 | |
| Power Switch | 1 | |
| 12V DC | 1 | |

## Hardware Resources

[Board Specification](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/01_Specification)
[Board Schematic](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/02_Schematic)
[PCB BOM](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/03_Designator_drawing)
[Board Dimension Diagram](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/04_Mechanical_drawing)
[Board 3D Model](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/05_3D_file)
[Some Chip Manuals](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/07_Datasheet)

## Getting Started

Note that 138K is currently not supported by the education version, and you need to download V1.9.9Beta-5 or a newer version of the commercial IDE for use.
Lic can be applied on the Gowin official website, or you can use the online Lic service provided by Sipeed. In the IDE, select Float Lic and fill in the following information:

~~~
ip: 43.128.7.128
port: 10559
~~~

Install IDE [Click me](https://wiki.sipeed.com/hardware/zh/tang/Tang-Nano-Doc/get_started/install-the-ide.html)


Example code [github](https://github.com/sipeed/TangMega-138KPro-example)

- Other Learning Resources

- Free online tutorial: [Verilog Tutorial](https://www.runoob.com/w3cnote/verilog-tutorial.html) (Learn Verilog)
- Free online FPGA tutorial: [Verilog](https://www.asic-world.com/verilog/index.html) (English website)
- Verilog practice website: [HDLBits](https://hdlbits.01xz.net/wiki/Main_Page) (English website)
- Online Gowin Semiconductor reference video tutorials: [Click here](http://www.gowinsemi.com.cn/video_complex.aspx?FId=n15:15:26)

## Communication Methods

- **Discussion forum: [maixhub.com/discussion](https://maixhub.com/discussion)**
- **QQ discussion group: [834585530](https://jq.qq.com/?_wv=1027&k=wBb8XUan)**
- Leave a message directly below this page
- Business email : [[email protected]]([email protected])

## Precautions

<table>
<tr>
<th>Item</th>
<th>Precautions</th>
</tr>
<tr>
<td>Chip Model</td>
<td>The specific model of the FPGA chip used by Tang Mega 138K Pro is GW5AST-LV138FPG676A. Please select the package model FCPBG676A in the IDE.</td>
</tr>
<tr>
<td>Static Electricity</td>
<td>Please avoid static electricity hitting the PCBA; release the static electricity from your hands before touching the PCBA.</td>
</tr>
<tr>
<td>Tolerance Voltage</td>
<td>When using GPIO pin headers for external communication, ensure that the IO voltage is 3.3V. Excessive voltage will permanently damage the PCBA.</td>
</tr>
<tr>
<td>FPC Socket</td>
<td>When connecting the FPC soft cable, please ensure that the cable is completely and correctly inserted into the socket without any deviation.</td>
</tr>
<tr>
<td>PCIE Gold Finger</td>
<td>When testing the PCIE gold finger, ensure that both the host and the board are in the off or unpowered state to avoid short-circuiting the gold finger due to displacement during the insertion process.</td>
</tr>
<tr>
<td>Plug and Unplug</td>
<td>Please completely power off before plugging and unplugging.</td>
</tr>
<tr>
<td>Avoid Short Circuit</td>
<td>Please avoid any liquid or metal touching the solder pads of the components on the PCBA during the power-on process, otherwise it may cause a short circuit and burn the PCBA.</td>
</tr>
</table>


## Contact

Tang Mega 138K can meet different needs of customers in various scenarios. For technical support and business cooperation, please contact [[email protected]]([email protected])

## Frequently Asked Questions

### The power light is not on after the board is powered on

1. Please check if the power switch of the board is turned on.
2. Check your power supply method.
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106 changes: 106 additions & 0 deletions docs/hardware/en/tang/tang-primer-25k/primer-25k.md
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# Tang Primer 25K

## Overview

Tang Primer 25K is a minuscule core board (23x18mm) designed based on [GW5A-LV25MG121](http://www.gowinsemi.com.cn/prod_view.aspx?TypeId=74&FId=t3:10:3&Id=188), accompanied by a 25K Dock base board that exposes all pins (excluding MIPI high-speed pins).

The ultra-small core board size can be applied in any volume-restricted scenarios.
The simple base board can connect a USB joystick, plug in a 40Pin SDRAM module, and three PMOD interfaces can connect to an HDMI display, PS2 joystick to form a typical RetroGame console configuration.
It can also be paired with the series of PMOD modules produced by Sipeed, for use in FPGA university teaching.

<div> <img src="./assets/25k_45.jpg" width=45%> <img src="./assets/25k_dock_45.jpg" width=45%> </div>

Purchase link: [Taobao](https://item.taobao.com/item.htm?spm=a1z10.5-c-s.w4002-24984936573.29.19b22db2a329yr&id=746293292946)

## Core Board Overview

<div> <img src="./assets/25k_top.jpg" width=45%> <img src="./assets/25k_bot.jpg" width=45%> </div>

## Basic Parameters

<table> <thead> <tr> <th style="text-align:center">Item</th> <th style="text-align:center">Parameter</th> <th style="text-align:center">Supplement</th> </tr> </thead> <tbody> <tr> <td style="text-align:left">FPGA Chip</td> <td style="text-align:left"><a href="http://www.gowinsemi.com.cn/prod_view.aspx?TypeId=74&FId=t3:10:3&Id=188">GW5A-LV25MG121</a> </td> <td style="text-align:left"> <table> <tr> <td>Logic Unit (LUT4)</td> <td>23040</td> </tr> <tr> <td>Register (FF)</td> <td>23040</td> </tr> <tr> <td>Distributed Static Random Access Memory S-SRAM (bits)</td> <td>180K</td> </tr> <tr> <td>Block Static Random Access Memory B-SRAM (bits)</td> <td>1008K</td> </tr> <tr> <td>Number of Block Static Random Access Memory B-SRAM</td> <td>56</td> </tr> <tr> <td>Multiplier (18x18 Multiplier)</td> <td>28</td> </tr> <tr> <td>Phase-Locked Loop (PLLs)</td> <td>6</td> </tr> <tr> <td>Total I/O Bank</td> <td>8</td> </tr> </table> </td> </tr> <tr> <td style="text-align:left">Flash</td> <td style="text-align:left">64Mbits NOR Flash</td> <td style="text-align:left">See <a href="#burn_flash">Burning to Flash</a></td> </tr> <tr> <td style="text-align:left">Overall Packaging</td> <td style="text-align:left">2x60P BTB Core Board</td> <td style="text-align:left"></td> </tr> <tr> <td style="text-align:left">General IO</td> <td style="text-align:left"> 75</td> <td style="text-align:left"></td> </tr> <tr> <td style="text-align:left"> MIPI IO </td> <td style="text-align:left"> 4lane Data</td> <td style="text-align:left"></td> </tr> </tbody> </table>

## Dock Base Board Product Image

<div> <img src="./assets/25k_dock_top.jpg" width=45%> <img src="./assets/25k_dock_bot.jpg" width=45%> </div>

## Board Parameters

<table> <thead> <tr> <th style="text-align:center">Item</th> <th style="text-align:center">Parameter</th> <th style="text-align:center">Remark</th> </tr> </thead> <tbody> <tr> <td style="text-align:left">Debugger</td> <td style="text-align:left">Onboard high-speed debugger, supports JTAG+UART, uses USB-C port for programming</td> <td style="text-align:left"></td> </tr> <tr> <td style="text-align:left">USB-A</td> <td style="text-align:left">One, can be used as a USB1.1 Host to connect game controllers and other HID devices</td> <td style="text-align:left"></td> </tr> <tr> <td style="text-align:left"> IO Pin </td> <td style="text-align:left"> One 2x20Pin 2.54 pin</td> <td style="text-align:left">Supports SDRAM module</td> </tr> <tr> <td style="text-align:left"> PMOD </td> <td style="text-align:left"> 3</td> <td style="text-align:left"></td> </tr> <tr> <td style="text-align:left">Button</td> <td style="text-align:left">2</td> <td style="text-align:left"></td> </tr> <tr> <td style="text-align:left">Size</td> <td style="text-align:left">64x40mm</td> <td style="text-align:left"></td> </tr> </tbody> </table>

## Hardware Information

Specifications, schematics, dimension drawings, etc. can be found here: [Click here](https://dl.sipeed.com/shareURL/TANG/Primer_25K)

- [Board Specification](https://dl.sipeed.com/shareURL/TANG/Primer_25K/01_Specification)
- [Board Schematic](https://dl.sipeed.com/shareURL/TANG/Primer_25K/02_Schematic)
- [Board Designator Drawing](https://dl.sipeed.com/shareURL/TANG/Primer_25K/03_Designator_drawing)
- [Board Dimension Drawing](https://dl.sipeed.com/shareURL/TANG/Primer_25K/04_Mechanical_drawing)
- [3D Model File](https://dl.sipeed.com/shareURL/TANG/Primer_25K/05_3D_file)
- [Core Board Packaging](https://dl.sipeed.com/shareURL/TANG/Primer_25K/06_PCB_Lib)
- [Chip Part Information](https://dl.sipeed.com/shareURL/TANG/Primer_25K/07_Datasheet)
- [Routing Length Table](https://dl.sipeed.com/shareURL/TANG/Primer_25K/08_Pin_Length_table)

3. Getting Started

`Prepare Development Environment` -> `Learn Relevant Syntax` -> `View Unboxing Guide` -> `Basic Code Writing` -> `View Official Documentation`

1. Install IDE: [Click here](./../Tang-Nano-Doc/get_started/install-the-ide.md)

2. Check out the [Getting Started Guide](https://wiki.sipeed.com/hardware/zh/tang/tang-primer-20k/start.html) to avoid some problems, and you can start coding from there.

3. If you feel pressured after completing the above lighting operation, you can fill in the gaps yourself:
You can learn Verilog on the following websites:

+ Online free tutorial: [Verilog Tutorial](https://www.runoob.com/w3cnote/verilog-tutorial.html) (Learn Verilog)
+ Online free FPGA tutorial: [Verilog](https://www.asic-world.com/verilog/index.html) (English website)
+ Verilog problem-solving website: [HDLBits](https://hdlbits.01xz.net/wiki/Main_Page) (English website)
+ Online Gowin Semiconductor reference video tutorial: [Click here](http://www.gowinsemi.com.cn/video_complex.aspx?FId=n15:15:26)

If you have questions about using the IDE, you can check out some official documents to familiarize yourself with the relevant content

- [SUG100-2.6_Gowin Cloud Source Software User Guide.pdf](http://cdn.gowinsemi.com.cn/SUG100-2.6_Gowin%E4%BA%91%E6%BA%90%E8%BD%AF%E4%BB%B6%E7%94%A8%E6%88%B7%E6%8C%87%E5%8D%97.pdf)
- [SUG949-1.1_Gowin_HDL Coding Style User Guide.pdf](http://cdn.gowinsemi.com.cn/SUG949-1.1_Gowin_HDL%E7%BC%96%E7%A0%81%E9%A3%8E%E6%A0%BC%E7%94%A8%E6%88%B7%E6%8C%87%E5%8D%97.pdf)
- [UG286-1.9.1_Gowin Clock Resource User Guide](http://cdn.gowinsemi.com.cn/UG286-1.9.1_Gowin%E6%97%B6%E9%92%9F%E8%B5%84%E6%BA%90(Clock)%E7%94%A8%E6%88%B7%E6%8C%87%E5%8D%97.pdf)
- [SUG940-1.3_Gowin Design Timing Constraint User Guide.pdf](http://cdn.gowinsemi.com.cn/SUG940-1.3_Gowin%E8%AE%BE%E8%AE%A1%E6%97%B6%E5%BA%8F%E7%BA%A6%E6%9D%9F%E7%94%A8%E6%88%B7%E6%8C%87%E5%8D%97.pdf)
- [SUG502-1.3_Gowin_Programmer User Guide.pdf](http://cdn.gowinsemi.com.cn/SUG502-1.3_Gowin_Programmer%E7%94%A8%E6%88%B7%E6%8C%87%E5%8D%97.pdf)
- [SUG114-2.5_Gowin Online Logic Analyzer User Guide.pdf](http://cdn.gowinsemi.com.cn/SUG114-2.5_Gowin%E5%9C%A8%E7%BA%BF%E9%80%BB%E8%BE%91%E5%88%86%E6%9E%90%E4%BB%AA%E7%94%A8%E6%88%B7%E6%8C%87%E5%8D%97.pdf)

All the above documents have been packaged into the download station [click me to jump](https://dl.sipeed.com/shareURL/TANG/Primer_20K/07_Chip_manual/CN/%E9%80%9A%E7%94%A8%E6%8C%87%E5%BC%95), if needed, you can click the compressed package to download them all.

- Example Summary

Please note that 25K requires the use of V1.9.9Beta-4 or newer IDE version.
http://www.gowinsemi.com.cn/faq.aspx

### Public Examples

Github link: https://github.com/sipeed/TangPrimer-25K-example


## Communication Methods

- **Discussion Forum: [maixhub.com](maixhub.com/discussion)**
- **QQ Discussion Group: [834585530](https://jq.qq.com/?_wv=1027&k=wBb8XUan)**
- Leave a message directly below this page
- Business email: [[email protected]]([email protected])



## Related Questions

### How to Download to External FLASH {#burn_flash}

Set the following options:

<img src="./assets/flash_mode.png" alt="flash_mode" width=75%>

### No Response or Incorrect Pin Phenomenon After Burning

First, make sure the correct model is selected, each parameter in the figure below is required to be consistent

<img src="./assets/partno.jpg" alt="device_choose" width=75%>

Then check whether your code and the corresponding simulation waveform meet the requirements

### For more questions and solutions, go to [Related Questions](./../Tang-Nano-Doc/questions.md) to view
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