moved pc trace from verilog to cpp as tracer module

sifive · Sep 1, 2024 · a270049 · a270049
1 parent 8aada87
commit a270049
Show file tree

Hide file tree

Showing 4 changed files with 761 additions and 3 deletions.
diff --git a/bin/indexer.js b/bin/indexer.js
@@ -34,7 +34,7 @@ async function main () {
     xassign(arr, body);
   }
 
-  fs.writeFileSync('./index.js', `'use strict';\n`, 'utf8');
+  fs.writeFileSync('./index.js', '\'use strict\';\n', 'utf8');
   const root = path.resolve(process.cwd(), 'specs');
   if (fs.pathExistsSync(root)) {
 

diff --git a/lib/amba-pdf-dl.js b/lib/amba-pdf-dl.js
@@ -1,7 +1,7 @@
 'use strict';
 
 const { createWriteStream, existsSync } = require('fs');
-const { mkdir } = require("fs/promises");
+const { mkdir } = require('fs/promises');
 const path = require('path');
 const { Readable } = require('stream');
 const { finished } = require('stream/promises');

diff --git a/package.json b/package.json
@@ -30,7 +30,7 @@
   },
   "homepage": "https://github.com/sifive/duh-bus#readme",
   "eslintConfig": {
-    "extends": "@drom/eslint-config/eslint4/node8"
+    "extends": "@drom/eslint-config/eslint8/node12"
   },
   "devDependencies": {
     "@drom/eslint-config": "^0.12.0",