Always specify `llvm_abiname` for RISC-V targets #131807

beetrees · 2024-10-17T00:27:31Z

For RISC-V targets, when llvm_abiname is not specified LLVM will infer the ABI from the target features, causing #116344 to occur. This PR adds the correct llvm_abiname to all RISC-V targets where it is missing (which are all soft-float targets), and adds a test to prevent future RISC-V targets from accidentally omitting llvm_abiname. The only affect of this PR is that -Ctarget-feature=+f (or similar) will no longer affect the ABI on the modified targets.

r? @RalfJung

rustbot · 2024-10-17T00:27:40Z

These commits modify compiler targets.
(See the Target Tier Policy.)

RalfJung · 2024-10-17T05:57:47Z

I can't speak to the consequences of this PR, so I can't review it, sorry. All I am doing is going around and bothering everyone to get their ABIs in check, I don't actually know the technical details of how exactly to do that on each architecture. ;)

r? compiler

RalfJung · 2024-10-17T05:59:55Z

The only affect of this PR is that -Ctarget-feature=+f (or similar) will no longer affect the ABI on the modified targets.

That sounds great!
What will -Ctarget-feature=-f do when the abiname says "use floats"?

workingjubilee · 2024-10-17T06:59:22Z

What will -Ctarget-feature=-f do when the abiname says "use floats"?

I think the answer is actually, surprisingly, that LLVM shrieks "DON'T!" at us. Obviously we have to actually reach codegen, but LLVM actually checks this sort of dependency for the RISCV backend.

RalfJung · 2024-10-17T07:05:35Z

I wish that would be true. However, according to this, the answer is "Disabling target features required by the requested ABI will cause LLVM to ignore the ABI", which sounds less nice.

RalfJung · 2024-10-17T07:06:07Z

Also we probably want to show a nicer error than have LLVM do error reporting. But it's always good to have a safety net :)

workingjubilee · 2024-10-17T07:09:46Z

Ah, yeah, I checked and the code that I thought might be there isn't. Sadness!

RalfJung · 2024-10-17T07:59:54Z

Would it be worth asking LLVM to add such checks? For the arm backend at least that might actually be happening.

RalfJung · 2024-10-17T08:00:47Z

See <llvm/llvm-project#110383> for the arm issue.

workingjubilee · 2024-10-17T08:41:00Z

I think we can make that happen, yeah. RISCV does some forms of feature dependency-checking already.

workingjubilee · 2024-10-22T03:23:15Z

I believe this PR that sets llvm_abiname for all RISCV targets is correct, and I know it is for the tier 2 targets it affects, so I am approving it. Hopefully it simply breaks on CI if I am wrong about those. I am pinging affected tier 3 target maintainers as a "by the way": Let us know if this needs fixing, but it shouldn't, because this should be a nop unless you were depending on -Ctarget-feature="+f" affecting the ABI.

esp-espidf: @ivmarkov, @MabezDev, @SergioGasquez
risc0-zkvm: @flaub, @jbruestle, @SchmErik
nuttx: @no1wudi
xous: @xobs

@bors r+

bors · 2024-10-22T03:23:18Z

📌 Commit 3ea91c0 has been approved by workingjubilee

It is now in the queue for this repository.

…kingjubilee Rollup of 6 pull requests Successful merges: - rust-lang#130432 (rust_for_linux: -Zregparm=<N> commandline flag for X86 (rust-lang#116972)) - rust-lang#131697 (`rt::Argument`: elide lifetimes) - rust-lang#131807 (Always specify `llvm_abiname` for RISC-V targets) - rust-lang#131954 (shave 150ms off bootstrap) - rust-lang#132015 (Move const trait tests from `ui/rfcs/rfc-2632-const-trait-impl` to `ui/traits/const-traits`) - rust-lang#132017 (Update triagebot.toml) r? `@ghost` `@rustbot` modify labels: rollup

Rollup merge of rust-lang#131807 - beetrees:riscv-target-abi, r=workingjubilee Always specify `llvm_abiname` for RISC-V targets For RISC-V targets, when `llvm_abiname` is not specified LLVM will infer the ABI from the target features, causing rust-lang#116344 to occur. This PR adds the correct `llvm_abiname` to all RISC-V targets where it is missing (which are all soft-float targets), and adds a test to prevent future RISC-V targets from accidentally omitting `llvm_abiname`. The only affect of this PR is that `-Ctarget-feature=+f` (or similar) will no longer affect the ABI on the modified targets.  r? `@RalfJung`

topperc · 2024-10-28T18:04:43Z

compiler/rustc_target/src/spec/tests/tests_impl.rs

+                assert_matches!(&*self.llvm_abiname, "ilp32" | "ilp32f" | "ilp32d" | "ilp32e")
+            }
+            "riscv64" => {
+                assert_matches!(&*self.llvm_abiname, "lp64" | "lp64f" | "lp64d" | "lp64q")


What about lp64e?

we currently don't support any rv64e targets, and we don't really (intentionally) support "this can have one of multiple ABIs" target tuples. we'll need to fix this when we cross that bridge though, so if you want to PR to fix it now, happy to take that on.

more explicitly: r? me and I'll sign off on it.

I took the list of ABIs from the RISC-V ABIs Specification: lp64e is not currently mentioned anywhere in that document as it's still waiting for a 2-year-old PR to be reviewed and merged.

rustbot · 2024-10-28T19:04:26Z

Assignment is not allowed on a closed PR.

workingjubilee · 2024-10-28T19:04:35Z

thbbbt rustbot.

…, r=workingjubilee Remove `""` case from RISC-V `llvm_abiname` match statement For RISC-V, `""` isn't the always the same ABI as `"ilp32"`/`"lp64"` (`""` means LLVM will infer the ABI based on the enabled target features), but `create_object_file` currently assumes that it is. Since all RISC-V targets explicitly specify their ABI since rust-lang#131807, this PR removes `""` from the match arm's pattern (meaning an empty string will now fall through to the `_ => bug!` arm). r? `@workingjubilee`

Rollup merge of rust-lang#132421 - beetrees:riscv-abi-no-empty-string, r=workingjubilee Remove `""` case from RISC-V `llvm_abiname` match statement For RISC-V, `""` isn't the always the same ABI as `"ilp32"`/`"lp64"` (`""` means LLVM will infer the ABI based on the enabled target features), but `create_object_file` currently assumes that it is. Since all RISC-V targets explicitly specify their ABI since rust-lang#131807, this PR removes `""` from the match arm's pattern (meaning an empty string will now fall through to the `_ => bug!` arm). r? `@workingjubilee`

Ref: rust-lang/rust#131807

rustbot assigned RalfJung Oct 17, 2024

rustbot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. labels Oct 17, 2024

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Always specify llvm_abiname for RISC-V targets

3ea91c0

beetrees force-pushed the riscv-target-abi branch from 03243c5 to 3ea91c0 Compare October 17, 2024 01:08

rustbot assigned nnethercote and unassigned RalfJung Oct 17, 2024

RalfJung mentioned this pull request Oct 17, 2024

Figure out which target features are required for which SIMD size #131800

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workingjubilee added O-riscv Target: RISC-V architecture A-ABI Area: Concerning the application binary interface (ABI) labels Oct 21, 2024

bors added S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Oct 22, 2024

workingjubilee mentioned this pull request Oct 22, 2024

Rollup of 6 pull requests #132020

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bors merged commit 1b24c6f into rust-lang:master Oct 22, 2024
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rustbot added this to the 1.84.0 milestone Oct 22, 2024

beetrees deleted the riscv-target-abi branch October 22, 2024 09:12

krasimirgg mentioned this pull request Oct 25, 2024

LLVM 20 produces different assembly for rust/tests/assembly/riscv-soft-abi-with-float-features.rs #132139

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topperc reviewed Oct 28, 2024

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This was referenced Oct 30, 2024

Add lp64e RISC-V ABI #132354

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Remove "" case from RISC-V llvm_abiname match statement #132421

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Arnavion added a commit to Arnavion/riscv that referenced this pull request Nov 4, 2024

Fix breakage with latest nightly.

fb480b0

Ref: rust-lang/rust#131807

workingjubilee mentioned this pull request Nov 4, 2024

Some -Ctarget-features must be restrained on RISCV #132618

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Always specify `llvm_abiname` for RISC-V targets #131807

Always specify `llvm_abiname` for RISC-V targets #131807

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Always specify llvm_abiname for RISC-V targets #131807

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Always specify `llvm_abiname` for RISC-V targets #131807

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