Release 1.0.0-rc4 · riscv/riscv-debug-spec

What's Changed

Update maskmax6 detection algorithm to always work by @rtwfroody in #1019
Fix for mepc example typo by @albert-azcarate in #1042
Drop dmcontrol check before abstract command by @en-sc in #1048
Update resume from Debug Mode behavior with Smdbltrp by @ved-rivos in #1051
Clarify that DMI nop does not affect busy/error. by @rtwfroody in #1055
DM should ignore some bits while abstract command is executing by @rtwfroody in #1046
Fix sw instruction assembly in Appendix A.2 by @tienntr in #1059
dtmcs.abits description should reference to dmi.address by @en-sc in #1061
Mention that the spec addresses Zicsr by @rtwfroody in #1064
Clarify prv and v reflect privilege and virtualization modes. by @rtwfroody in #1066
Clarify Memory Access acts like data access. by @rtwfroody in #1065
Rewrite B.2.8 paragraph to be more clear. by @rtwfroody in #1068
Clarify why to use progbuf to access FPRs/CSRs by @rtwfroody in #1067
Triggers with action != 0 or 1 fire independently. by @rtwfroody in #1070
Integrated ratified Zicfilp extension by @ved-rivos in #1071
Fix asciidoc conversion problem for #1090. by @pdonahue-ventana in #1091

Full Changelog: 1.0.0-rc3...1.0.0-rc4