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update(cirq-rigetti): use pyquil v4 #6281
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pavoljuhas
merged 118 commits into
quantumlib:main
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jselig-rigetti:rigetti-use-pyquil-v4
Jun 11, 2024
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250cba3
chore: use pyquil v4
jselig-rigetti 23b6294
chore: change mock expectations
jselig-rigetti f1688ff
chore: keep key check
jselig-rigetti 0daae21
chore: refactor away deprecation warning
jselig-rigetti cc71d1f
chore: ensure atomic memory values are sequences
jselig-rigetti 2a813ca
chore: use stable pyquil v4 version
jselig-rigetti 027ba98
Add support for Kraus operators, POVMs and parametric defgates
bramathon 83e510e
clean up tests
bramathon 474265b
Cleaned up formatting for quil_input
bramathon 48027f6
Cleaned up formatting for quil_input_test
bramathon 21c3fcd
Merge branch 'master' into rigetti-use-pyquil-v4
jselig-rigetti 9ba2ac0
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti 5c200c1
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti 8064e4e
chore: fix lint
jselig-rigetti afca68b
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti 2cbfe1b
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti f9fa557
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti bf42e72
Update quil->cirq conversion
bramathon 0b7c216
Fix formatting
bramathon 25ef38d
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti b1a1c1c
Update T1 experiment (#6487)
eliottrosenberg 2d4de4f
Remove python3.9 from CI tests (#6495)
NoureldinYosri da0f221
update parallel XEB notebook (#6494)
NoureldinYosri 7c65f16
Added `MSGate` to top level (#6466)
prakharb10 2f92166
Preserve circuit tags in transformer_primitives.map_operations (#6505)
maffoo 0b93e27
Update ClassicalSimulator to confirm to simulation abstraction (#6432)
shef4 e3f7cf3
Fix capitalization of GitHub in docs (#6509)
dstrain115 b83e63d
Bump black from 23.3.0 to 24.3.0 in /dev_tools/requirements/deps (#6512)
dependabot[bot] 32b5a0f
Format all files with black-24.3.0 (#6513)
pavoljuhas d6333a8
Add newly serializable gates to supported grid device gates (#6499)
NoureldinYosri 1d630f0
Ignore Python code formatting in git blame (#6514)
pavoljuhas 57c6d95
Bump follow-redirects from 1.15.4 to 1.15.6 in /cirq-web/cirq_ts (#6501)
dependabot[bot] 7b285b5
Add documentation to cirq.decompose protocol regarding specific targe…
tanujkhattar ce3757c
Add UNIT_SWEEP as an alias for UnitSweep (#6518)
dstrain115 8260cf4
Merge serializable_forms and deserialized_forms (#6520)
verult 9931158
Bump webpack-dev-middleware from 5.3.3 to 5.3.4 in /cirq-web/cirq_ts …
dependabot[bot] c4b50e5
Initialize processor sampler with the default device config key (#6521)
senecameeks 1113626
Fix ci-daily workflow failures on Mac OS X (#6532)
pavoljuhas ef725d7
Bump express from 4.18.1 to 4.19.2 in /cirq-web/cirq_ts (#6533)
dependabot[bot] 9458d09
Install cirq pre-release with stable dependencies (#6534)
pavoljuhas 2311afd
Undo temporary version pin of mpmath (#6535)
pavoljuhas 91a45a2
Add FSimViaModelTag (#6527)
BichengYing 902c66d
Fix density matrix references in other simulators (#6537)
dstrain115 ccedd43
Add Serialization and Deserialization Support of FSimViaModelTag. (#6…
BichengYing cff979a
pin scipy to ~1.12.0 to temporarily fix ci (#6545)
NoureldinYosri 0162147
Ensure the result of simulation is normalized (#6522)
NoureldinYosri f3ad0ac
Introduce gauge compilation (#6526)
NoureldinYosri 782104e
CI - migrate to docker compose v2 (#6547)
pavoljuhas 1794650
Add FSimViaModel Gate into device.proto (#6548)
BichengYing 0bb17ea
Remove doc references to stale gitter channel (#6540)
dstrain115 c16a244
Loosen the scipy condition in requirements.txt (#6549)
BichengYing 862439d
Bugfix in `comparison_key` and nicer `with_dimension` of `_BaseAncill…
tanujkhattar 5630687
Remove the `--pre` option from verify-published-package.sh (#6536)
pavoljuhas aafa40b
Improve repr of `_BaseAncillaQid` classes with prefix (#6555)
pavoljuhas 1d8304f
display tags by `str` instead of `repr` in circuit diagrams (#6530)
richrines1 3bc6d97
Avoid state vector normalization if it worsens the round offs (#6556)
pavoljuhas 3c6d51d
Bump tar from 6.1.11 to 6.2.1 in /cirq-web/cirq_ts (#6559)
dependabot[bot] 714fedf
check/all - exit with error status if any of checks failed (#6561)
pavoljuhas d61b802
Add Quantum Engine support for cirq.CZPowGate (#6562)
eliottrosenberg b4bbb02
Add UNKNOWN status code to retryable Quantum Engine errors (#6565)
wcourtney 5ece8a9
Update AQT Backend (#6441)
jbrixon e9454c9
CI - downgrade to macos-13 which has the needed Python versions (#6578)
pavoljuhas a2cab0d
Fix `__len__` of empty Product sweep to match actual length (#6575)
maffoo c4176e3
Removed deprecated processor_ids (#6563)
JaShom e3068ae
Escape & in SVG diagrams (#6579)
tanujkhattar 79b2954
Set maxsize of request queue to Quantum Engine (#6576)
senecameeks e95e6d3
Add a new gauge for SqrtCZ and support SqrtCZ† and fix and improve sp…
NoureldinYosri eeb4204
Optimize Clifford.__pow__ by using binary exponentiation (#6581)
migueltorrescosta ace9c3e
Avoid DivisionByZero error when TensorNetwork simplifies to a scalar …
pavoljuhas 77693fc
Support Python 3.12 (#6516)
pavoljuhas d503e7b
NEP-29 - enforce minimum Python version 3.10 (#6591)
pavoljuhas 77e3a0f
Implement dynamical decoupling. (#6515)
babacry 4769f83
Add a note about conda env to dev doc (#6592)
NoureldinYosri a21219b
Optimise QubitPermutationGate decomposition (#6588)
migueltorrescosta df4d14e
CI - deflake `Isolated pytest Ubuntu` (#6593)
pavoljuhas 7c76fb9
Delete cirq_ft (#6596)
NoureldinYosri 71cf6e7
Suppress superfluous warnings from numpy (#6599)
dstrain115 c2ad35a
CI - deflake `Isolated pytest Ubuntu` (#6603)
pavoljuhas 5ad129b
Release pins from all pytest-related packages (#6602)
pavoljuhas 4597f56
Create a generalized uniform superposition state gate (#6506)
prag16 8d3ef80
--- (#6610)
dependabot[bot] a330a62
Add Quantum Engine Support for InternalGate (#6613)
senecameeks ca516fd
Fix nightly build of the staging cirq website (#6615)
pavoljuhas 8ea8e1c
Update list of pre-release notebooks (#6609)
pavoljuhas fc5f932
enable simulation of controlled gates in classical simulator (#6589)
GregDMeyer 38ce205
Fix spurious failure of the check/all script (#6611)
pavoljuhas 95b9511
chore: fix tests after merge main
jselig-rigetti 0aeff33
chore: fix lint errors
jselig-rigetti 864f323
Merge branch 'main' into rigetti-use-pyquil-v4
pavoljuhas 6853c28
chore: fix formatting errors
jselig-rigetti b0596f9
chore: formatting and type fixes
jselig-rigetti a4422e7
fix: linting
jselig-rigetti 51e3b63
chore: format
jselig-rigetti b6318f1
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti 8ca86d2
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti 69cc065
chore: annotate question about type failures
jselig-rigetti 6a18157
chore: fix type errors, require that qubits be ints
jselig-rigetti d5b1812
chore: add missing excetion documentation
jselig-rigetti b3471d9
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti b8c85cf
chore: cache defgate_to_cirq and start fixing json implementation of isa
jselig-rigetti 3ab7c7a
chore: fix insignificant float rounding errors in json test fixture
jselig-rigetti 55eabe5
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti f0273ed
chore: add pragma no cover for underscore methods
jselig-rigetti 8412760
test: add pragma no cover to all lines failing coverage test
jselig-rigetti ef4c1f3
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti 770a75c
chore: remove print calls in tests
jselig-rigetti 5bd7252
chore: mock and test RigettiQCSService.list_quantum_processors
jselig-rigetti f667099
chore: remove unused test
jselig-rigetti 756afac
chore: increate pyquil version requirement
jselig-rigetti e1e200e
chore: fix import ordering lint complaint, unimplemented abstract met…
jselig-rigetti 5245a7d
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti 23f086d
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti e36bb35
chore: use qvm to create qcs service in tests
jselig-rigetti e2deb8f
fix: code review suggestions: default None for optional arguments, us…
jselig-rigetti 41c49f5
test: add test for get_rigetti_qcs_aspen_device
jselig-rigetti 34641c4
Update cirq-rigetti/cirq_rigetti/service_test.py
jselig-rigetti 58bbd89
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti 502e195
chore: fix formatting
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We need to check for atomic values and wrap them in a list to prevent a breaking change here.
In v3,
Program.write_memory
accepted atomic values for memory regions of length 1. For example,Program.write_memory("ro", 1)
was valid ifro
was defined asDECLARE ro BIT[1]
. In v4, the newMemoryMap
only accepts sequences of values for a memory region, even if that memory region happens to be length 1.There was a problem hiding this comment.
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fixed this in the lines above 👍