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Ivi diff v8 #109

Merged
merged 16 commits into from
Apr 16, 2024
Merged

Ivi diff v8 #109

merged 16 commits into from
Apr 16, 2024

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zhonghuis
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@sjshweta sjshweta closed this Apr 8, 2024
@sjshweta sjshweta reopened this Apr 8, 2024
@sjshweta sjshweta closed this Apr 10, 2024
@sjshweta sjshweta reopened this Apr 10, 2024
@sysopenci
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Improper Commit Message
Tracked on not found in commit message,
make sure Tracked-On: Jira-ticket is present.

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Android CI has started Engineering Build for this issue ,Please check Android CI Web for more details.

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SUCCESS: Android CI has completed Engineering Build for this issue, Please check Android CI Web for more details.

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Android CI has started Engineering Build for this issue ,Please check the linked Tracked-On issue/Android CI Web for more details.

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Android CI has started Engineering Build for this issue ,Please check the linked Tracked-On issue/Android CI Web for more details.

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FAILURE: Android CI has completed Engineering Build for this issue.Please check the linked Tracked-On issue/Android CI Web for more details.

feijiang1
feijiang1 approved these changes Apr 12, 2024
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LGTM

@sysopenci
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FAILURE: Android CI has completed Engineering Build for this issue.Please check the linked Tracked-On issue/Android CI Web for more details.

@zhonghuis
Refine gpu generation info from upstream
3b3c397 
Remove GEN3, which is no longer supported.
Add more device id for GEN9, GEN12, ADL-P from UPSTREAM.
Make Y-Tile bo creation available for framebuffer.

As ADL-P tiled framebuffer allocation code in kernel depends
on DPT. The DPT kernel code in smr0 branch is not the latest, which
will cause tiled framebuffer alloc fail in gvt-d mode. Therefore,
just disable tiled fb for ADL-P in vm mode. This is not needed in
newer kernel version.

Tracked-On: OAM-117251
Signed-off-by: chenyanxzhu <[email protected]>
@zhonghuis
Refine the init function and fix issue
df53b9b 
Alloc no-tile buffer when sriov mode
If has dGPU, do not use Tiling Y.

Tracked-On:
Signed-off-by: HeYue <[email protected]>
Signed-off-by: chenyanxzhu <[email protected]>
@zhonghuis
INTERNAL: Allocate tiling buffer for hw usage
52c45cd 
For sw usage, allocate linear buffer.

Tracked-On:
Signed-off-by: HeYue <[email protected]>
@zhonghuis
Remove drv_kms_
103dce3 
Use i915 for both render and display buffer alloc.
Kvm doesn't support tiled fb in adl-p, turn off tiled fb
for that. Disable tiling-y for all render format for dGPU
doesn't support it.

Tracked-On:
Signed-off-by: chenyanxzhu <[email protected]>
@zhonghuis
INTERNAL: Adjust the condition to check KVM
8bcb981 
The hypervisor signatures of kernel 5.10 and
5.15 are different.

Tracked-On:
Signed-off-by: HeYue <[email protected]>
@zhonghuis
Fixed the validateBufferSize issue
a164b3b 
when we use format HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED to
allocate the buffer, we get the buffer with format
DRM_FORMAT_XBGR8888. The validateBufferSize will return an error
because format mismatch. So we should ignore this type.

Tracked-On:
Signed-off-by: zhangyichix <[email protected]>
@zhonghuis
Fixed the issue that sw codec fails to validate 10-bit type buffer
ac07746 
The function validateBufferSize fails when sw codec allocates buffer
with HAL_PIXEL_FORMAT_YCBCR_P010. The reason is that the pixel format
will be converted to drm format for allocating buffer, then
the format of the handle is assigned to HAL_PIXEL_ format type with
i915_private_invert_format, but the descriptor.format is still
the pixel format, they must be different when checked in
validateBufferSize. So we check the format type after uniformly
converting the pixel/HAL format to drm format.

Tracked-On:
Signed-off-by: zhangyichix <[email protected]>
@zhonghuis
Add print level INFO
9273056 
Instead of printing all logs with ERROR level, some logs just
need INFO level.

Tracked-On:
Signed-off-by: chenyanxzhu <[email protected]>
@zhonghuis
Add dGPU support
aad39eb 
Changes include
- Using tile 4 instead of tile y.
- Querying memory regions using ioctl
- Horizontal and veritical alignment based on gen version

Tracked-On:
Change-Id: Id3f799ce26f6e154e75a81f22c92e15799759ca6
Signed-off-by: Huang Rui <[email protected]>
Signed-off-by: Mao, Marc <[email protected]>
Signed-off-by: Jeevaka Prabu Badrappan <[email protected]>
Signed-off-by: Kanlii Hu <[email protected]>
Signed-off-by: Fei Jiang <[email protected]>
Signed-off-by: He Yue <[email protected]>
@zhonghuis
Add prelim drm uapi support
8c92682 
Kernel supports flex and arc series cards with prelim uapi.
Switch to use prelim uapi in default and fallback to legacy uapi if it
works on upstream kernels.

Tracked-On:
Change-Id: Id3f799ce26f6e154e75a81f22c92e15799759ca6
Signed-off-by: Huang Rui <[email protected]>
Signed-off-by: Mao, Marc <[email protected]>
Signed-off-by: Jeevaka Prabu Badrappan <[email protected]>
Signed-off-by: Kanlii Hu <[email protected]>
Signed-off-by: Fei Jiang <[email protected]>
Signed-off-by: He Yue <[email protected]>
@zhonghuis
Fix encoder fps low for rpl igpu
d493ef4 
Tests done: Tested with antutu benchmark, 'video editing' score
has increased.

Tracked-On:
Signed-off-by: ZhuChenyanX <[email protected]>
@zhonghuis
Fix vulkan app can't display on iGPU in VM
a86999f 
In VM if run vulkan on iGPU, i915_dev->has_fence_reg
is 0, so DRM_IOCTL_I915_GEM_SET_TILING and
DRM_IOCTL_I915_GEM_GET_TILING will never be invoked.
Meanwhile if on dg2, i915_dev->has_fence_reg also is 0.
So the flag 'i915_dev->has_fence_reg' can't be using to
check if invoke GET_TILING,SET_TILING.
Consider if run vulkan app not on dg2, should invoke
GET_TILING,SET_TILING.

Tracked-On:
Signed-off-by: Li, HaihongX <[email protected]>
@zhonghuis
Fixed a performance issue for NeuSoft HMI app
1d8d18f 
Neusoft Demo app performance is low
It is caused by the Choreographer->doFrame->travesal->draw function.
This function will do the copyBlit operation.
The WB flag will use the cache to gain performance.
So we should not use the WC flag for the
case of BO_USE_SW_READ_OFTEN,due to the frequent CPU data reads.

Tracked-On:
Signed-off-by: Li,Gaoshun [email protected]
@zhonghuis
Ignore set domain for dgpu
1698ff5 
Cause kernel doesn't support this op for dgpu.

Tracked-On:
Signed-off-by: chenyanxzhu <[email protected]>
@zhonghuis
INTERNAL:Fix Coverity issues
f7f0962 
This is to help fix Coverity issues in minigbm project.

CIDs:222122 188451 203271 255440

Tracked-On:
Signed-off-by: manxiaoliang <[email protected]>
@zhonghuis
Fix android VM boot issue
2861e6e 
Tracked-On: OAM-117251
Signed-off-by: HeYue <[email protected]>
@sysopenci
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Android CI has started Engineering Build for this issue ,Please check the linked Tracked-On issue/Android CI Web for more details.

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@sysopenci
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Android CI has started Engineering Build for this issue ,Please check the linked Tracked-On issue/Android CI Web for more details.

@sysopenci
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FAILURE: Android CI has completed Engineering Build for this issue.Please check the linked Tracked-On issue/Android CI Web for more details.

1 similar comment
@sysopenci
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FAILURE: Android CI has completed Engineering Build for this issue.Please check the linked Tracked-On issue/Android CI Web for more details.

@sysopenci
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one of the dependent pr cannot be Rebase and Merged; please fix the issue and commit your changes once again to run EB.

@sysopenci
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Android CI has started Engineering Build for this issue ,Please check the linked Tracked-On issue/Android CI Web for more details.

@sysopenci
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SUCCESS: Android CI has completed Engineering Build for this issue.Please check the linked Tracked-On issue/Android CI Web for more details.

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Android CI has started MERGE Build for this pr ,Please check the linked Tracked-On issue/Android CI Web for more details.

@sysopenci sysopenci merged commit b5053aa into projectceladon:upstream_main Apr 16, 2024
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Android CI has completed MERGE Build for this pr, build is SUCCESS. Please check the linked Tracked-On issue/Android CI Web for more details. For Binaries: /cactus-absp-or-local/celadon-merge/404

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@zhonghuis @sysopenci @feijiang1 @sjshweta