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fixup! manifest: Update sdk-zephyr revision and align to new API
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e-rk authored and NordicBuilder committed Oct 23, 2024
1 parent 43c31ed commit b7a79c7
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Showing 2 changed files with 3 additions and 4 deletions.
1 change: 1 addition & 0 deletions subsys/debug/cpu_load/cpu_load.c
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,7 @@ static uint32_t shared_ch_mask;
(IS_ENABLED(CONFIG_CPU_LOAD_USE_SHARED_DPPI_CHANNELS) && \
(BIT(ch) & shared_ch_mask))


/** @brief Allocate (D)PPI channel. */
static nrfx_err_t ppi_alloc(uint8_t *ch, uint32_t evt)
{
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6 changes: 2 additions & 4 deletions subsys/debug/ppi_trace/ppi_trace.c
Original file line number Diff line number Diff line change
Expand Up @@ -51,10 +51,6 @@ LOG_MODULE_REGISTER(ppi_trace, CONFIG_PPI_TRACE_LOG_LEVEL);
[DT_PROP(gpio_node, port)] = \
NRFX_GPIOTE_INSTANCE(DT_PROP(GPIOTE_NODE(gpio_node), instance)),

#ifdef DPPI_PRESENT
static nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);
#endif

static const nrfx_gpiote_t *get_gpiote(nrfx_gpiote_pin_t pin)
{
static const nrfx_gpiote_t gpiote[GPIO_COUNT] = {
Expand All @@ -69,6 +65,8 @@ static nrfx_err_t ppi_alloc(uint8_t *ch, uint32_t evt)
{
nrfx_err_t err;
#ifdef DPPI_PRESENT
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);

if (*PUBLISH_ADDR(evt) != 0) {
/* Use mask of one of subscribe registers in the system,
* assuming that all subscribe registers has the same mask for
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