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Currently you can use VHPI to read or update signals but I haven't implemented the |
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A minimal working example that demonstrates the kind of functionality you need. |
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I heavily use the Foreign Language Interface (FLI) in Modelsim to generate my own signals and processes for my verification. In fact I am writing my testbenches in the OO language Ruby which interacts with the Modelsim simulation kernel via the FLI.
Is it in nvc possible to generate my own signals and processes after the elaboration is done ?
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