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Fix query for cache size #41

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merged 2 commits into from
Oct 6, 2024
Merged

Fix query for cache size #41

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fb35567
Refactor the initialization of the target machine
mscuttari Oct 6, 2024
4bc03e3
Use cache size instead of wrong cache line size
mscuttari Oct 6, 2024
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8 changes: 7 additions & 1 deletion include/public/marco/Frontend/FrontendActions.h
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Original file line number Diff line number Diff line change
Expand Up @@ -100,6 +100,12 @@ class CodeGenAction : public ASTAction {
/// Set up the LLVM's TargetMachine.
bool setUpTargetMachine();

/// Get the LLVM's TargetMachine.
llvm::TargetMachine &getTargetMachine();

/// Get the LLVM's TargetMachine.
const llvm::TargetMachine &getTargetMachine() const;

/// Get the data layout of the machine for which the code is being
/// compiled.
llvm::DataLayout getDataLayout() const;
Expand Down Expand Up @@ -205,6 +211,7 @@ class CodeGenAction : public ASTAction {

private:
CodeGenActionKind action;
std::unique_ptr<llvm::TargetMachine> targetMachine;
mlir::DialectRegistry mlirDialectRegistry;
std::unique_ptr<mlir::MLIRContext> mlirContext;
std::unique_ptr<DiagnosticHandler> diagnosticHandler;
Expand All @@ -213,7 +220,6 @@ class CodeGenAction : public ASTAction {
protected:
std::unique_ptr<mlir::ModuleOp> mlirModule;
std::unique_ptr<llvm::Module> llvmModule;
std::unique_ptr<llvm::TargetMachine> targetMachine;
};

class EmitMLIRAction : public CodeGenAction {
Expand Down
55 changes: 25 additions & 30 deletions lib/Frontend/FrontendActions.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,7 @@
#include "llvm/IR/LegacyPassManager.h"
#include "llvm/IR/Verifier.h"
#include "llvm/IRReader/IRReader.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Passes/PassBuilder.h"
#include "llvm/Passes/StandardInstrumentations.h"
#include "llvm/Support/Path.h"
Expand Down Expand Up @@ -419,6 +420,10 @@ bool CodeGenAction::beginSourceFilesAction() {
createMLIRContext();
}

if (!setUpTargetMachine()) {
return false;
}

if (action == CodeGenActionKind::GenerateMLIR) {
return generateMLIR();
}
Expand Down Expand Up @@ -490,9 +495,18 @@ bool CodeGenAction::setUpTargetMachine() {
return true;
}

llvm::DataLayout CodeGenAction::getDataLayout() const {
llvm::TargetMachine &CodeGenAction::getTargetMachine() {
assert(targetMachine && "TargetMachine has not been initialized yet");
return *targetMachine;
}

const llvm::TargetMachine &CodeGenAction::getTargetMachine() const {
assert(targetMachine && "TargetMachine has not been initialized yet");
return targetMachine->createDataLayout();
return *targetMachine;
}

llvm::DataLayout CodeGenAction::getDataLayout() const {
return getTargetMachine().createDataLayout();
}

void CodeGenAction::registerMLIRDialects() {
Expand Down Expand Up @@ -688,12 +702,7 @@ bool CodeGenAction::generateMLIRLLVM() {

void CodeGenAction::setMLIRModuleTargetTriple() {
assert(mlirModule && "MLIR module has not been created yet");

if (!targetMachine) {
setUpTargetMachine();
}

const std::string &triple = targetMachine->getTargetTriple().str();
const std::string &triple = getTargetMachine().getTargetTriple().str();

llvm::StringRef tripleAttrName =
mlir::LLVM::LLVMDialect::getTargetTripleAttrName();
Expand All @@ -717,12 +726,7 @@ void CodeGenAction::setMLIRModuleTargetTriple() {

void CodeGenAction::setMLIRModuleDataLayout() {
assert(mlirModule && "MLIR module has not been created yet");

if (!targetMachine) {
setUpTargetMachine();
}

const llvm::DataLayout &dl = targetMachine->createDataLayout();
const llvm::DataLayout &dl = getTargetMachine().createDataLayout();

llvm::StringRef dlAttrName = mlir::LLVM::LLVMDialect::getDataLayoutAttrName();

Expand Down Expand Up @@ -1098,10 +1102,11 @@ void CodeGenAction::buildMLIRBufferDeallocationPipeline(
}

std::unique_ptr<mlir::Pass> CodeGenAction::createMLIRLoopTilingPass() {
auto &ci = getInstance();
const auto *subtargetInfo = getTargetMachine().getMCSubtargetInfo();

if (auto cacheLineSize = ci.getTarget().getCPUCacheLineSize()) {
return mlir::affine::createLoopTilingPass(*cacheLineSize);
if (auto cacheSize = subtargetInfo->getCacheSize(0);
cacheSize && *cacheSize >= 1024) {
return mlir::affine::createLoopTilingPass(*cacheSize);
}

return mlir::affine::createLoopTilingPass();
Expand Down Expand Up @@ -1178,12 +1183,7 @@ bool CodeGenAction::generateLLVMIR() {

void CodeGenAction::setLLVMModuleTargetTriple() {
assert(llvmModule && "LLVM module has not been created yet");

if (!targetMachine) {
setUpTargetMachine();
}

const std::string &triple = targetMachine->getTargetTriple().str();
const std::string &triple = getTargetMachine().getTargetTriple().str();

if (llvmModule->getTargetTriple() != triple) {
// The LLVM module already has a target triple which is different from
Expand All @@ -1199,12 +1199,7 @@ void CodeGenAction::setLLVMModuleTargetTriple() {

void CodeGenAction::setLLVMModuleDataLayout() {
assert(llvmModule && "LLVM module has not been created yet");

if (!targetMachine) {
setUpTargetMachine();
}

const llvm::DataLayout &dataLayout = targetMachine->createDataLayout();
const llvm::DataLayout &dataLayout = getTargetMachine().createDataLayout();

if (llvmModule->getDataLayout() != dataLayout) {
// The LLVM module already has a data layout which is different from the
Expand Down Expand Up @@ -1236,7 +1231,7 @@ void CodeGenAction::runOptimizationPipeline() {
llvm::StandardInstrumentations si(getLLVMContext(), false);
si.registerCallbacks(pic, &mam);

llvm::PassBuilder pb(targetMachine.get(), pto, pgoOpt, &pic);
llvm::PassBuilder pb(&getTargetMachine(), pto, pgoOpt, &pic);

// Register all the basic analyses with the managers.
pb.registerModuleAnalyses(mam);
Expand Down