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[racl] Implement RACL Control IP
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Signed-off-by: Robert Schilling <[email protected]>
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Razer6 committed Dec 17, 2024
1 parent 99ac57e commit dfcda08
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1 change: 1 addition & 0 deletions hw/ip_templates/racl_ctrl/README.md
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# RACL Control Permission IP
162 changes: 162 additions & 0 deletions hw/ip_templates/racl_ctrl/data/racl_ctrl.hjson.tpl
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// Copyright lowRISC contributors (OpenTitan project).
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

# RACL Control register template
#
{
name: "${module_instance_name}",
human_name: "RACL Control",
one_line_desc: "Implements the RACL policy registers to distribute to subscribing IPs.",
one_paragraph_desc: '''
Implements the RACL policy registers to distribute to subscribing IPs.
'''
// Unique comportable IP identifier defined under KNOWN_CIP_IDS in the regtool.
cip_id: "43",
design_spec: "../doc",
dv_doc: "../doc/dv",
hw_checklist: "../doc/checklist",
sw_checklist: "/sw/device/lib/dif/dif_racl_ctrl",
revisions: [
{
version: "1.0.0",
life_stage: "L1",
design_stage: "D0",
verification_stage: "V0",
dif_stage: "S0",
}
]
clocking: [
{clock: "clk_i", reset: "rst_ni"},
]
bus_interfaces: [
{ protocol: "tlul", direction: "device" }
],
alert_list: [
% if enable_shadow_reg:
{ name: "recov_ctrl_update_err",
desc: "This recoverable alert is triggered upon detecting an update error in the shadowed Control Register."
}
% endif
{ name: "fatal_fault"
desc: "This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected."
}
],
countermeasures: [
{ name: "BUS.INTEGRITY",
desc: "End-to-end bus integrity scheme."
}
% if enable_shadow_reg:
{ name: "RACL_POLICY.CONFIG.SHADOW",
desc: "RACL policy registers are shadowed."
}
% endif
]
regwidth: "32",
param_list: [
{ name: "NumPolicies",
desc: "Number of policies",
type: "int",
default: "${nr_policies}",
local: "true"
},
{ name: "NumSubscribingIps",
desc: "Number of subscribing RACL IPs",
type: "int",
default: "1",
expose: "true"
local: "true"
},
],
inter_signal_list: [
{ struct: "policies",
type: "uni",
name: "policies",
act: "req",
package: "racl_pkg",
desc: '''
Policy vector distributed to the subscribing RACL IPs.
'''
},
],

registers: [
{ name: "ERROR_LOG"
desc: "Error logging registers"
swaccess: "ro"
hwaccess: "hwo"
hwqe: "true"
fields: [
{ bits: "0"
name: "valid"
resval: 0x0
swaccess: "rw1c"
hwaccess: "hrw"
desc: '''
Indicates a RACL error and the log register contains valid data.
Writing a one clears the error log register.
'''
}
{ bits: "1"
name: "overflow"
resval: 0x0
desc: '''
Indicates a RACL error overflow when a RACL error occurred while the log register was set.
'''
}
{ bits: "2"
name: "write_read"
resval: 0x0
desc: '''
0: Write transfer was denied.
1: Read transfer was denied.
'''
}
{ bits: "${3 + nr_role_bits - 1}:3"
name: "role"
resval: 0x0
desc: '''
RACL role causing the error.
'''
}
{ bits: "${3 + nr_role_bits + nr_ctn_uid_bits - 1}:${3 + nr_role_bits}"
name: "ctn_uid"
resval: 0x0
desc: '''
CTN UID causing the error.
'''
}
]
}
% for policy in policies:
{ name: "POLICY_${policy['name'].upper()}${"_SHADOWED" if enable_shadow_reg else ""}"
desc: '''
Read and write policy for ${policy}
'''
swaccess: "rw"
hwaccess: "hro"
% if enable_shadow_reg:
shadowed: "true"
update_err_alert: "recov_ctrl_update_err"
storage_err_alert: "fatal_fault"
% endif
fields: [
{ bits: "31:16"
name: "write_perm"
resval: ${policy['wr_default']}
desc: '''
Write permission for policy ${policy}
'''
}
{ bits: "15:0"
name: "read_perm"
resval: ${policy['rd_default']}
desc: '''
Read permission for policy ${policy}
'''
}
]
}
% endfor
]
}
49 changes: 49 additions & 0 deletions hw/ip_templates/racl_ctrl/data/racl_ctrl.tpldesc.hjson
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// Copyright lowRISC contributors (OpenTitan project).
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
{
template_param_list: [
{
name: "topname"
desc: "Name of top-level design, e.g., 'darjeeling' or 'earlgrey'"
type: "string"
default: ""
}
{
name: "module_instance_name"
desc: "instance name in case there are multiple RACL Ctrl instances"
type: "string"
default: "racl_ctrl"
}
{
name: "enable_shadow_reg"
desc: "Enable shadow reg protection for policy registers"
type: "bool"
default: true
}
{
name: "nr_role_bits"
desc: "Number of RACL bits used for roles"
type: "int"
default: "4"
}
{
name: "nr_ctn_uid_bits"
desc: "Number of CTN UID bits"
type: "int"
default: "8"
}
{
name: "nr_policies"
desc: "Number of policies"
type: "int"
default: "16"
}
{
name: "policies"
desc: "The RACL policies"
type: "object"
default: []
}
]
}
4 changes: 4 additions & 0 deletions hw/ip_templates/racl_ctrl/doc/interfaces.md.tpl
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${"#"} Hardware Interfaces

<!-- BEGIN CMDGEN util/regtool.py --interfaces ./hw/top_${topname}/ip_autogen/racl_ctrl/data/racl_ctrl.hjson -->
<!-- END CMDGEN -->
4 changes: 4 additions & 0 deletions hw/ip_templates/racl_ctrl/doc/registers.md.tpl
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${"#"} Registers

<!-- BEGIN CMDGEN util/regtool.py -d ./hw/top_${topname}/ip_autogen/racl_ctrl/data/racl_ctrl.hjson -->
<!-- END CMDGEN -->
5 changes: 5 additions & 0 deletions hw/ip_templates/racl_ctrl/lint/racl_ctrl.vlt.tpl
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// Copyright lowRISC contributors (OpenTitan project).
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// waiver file for ${module_instance_name}
8 changes: 8 additions & 0 deletions hw/ip_templates/racl_ctrl/lint/racl_ctrl.waiver.tpl
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# Copyright lowRISC contributors (OpenTitan project).
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
#
# waiver file for ${module_instance_name}

waive -rules {HIER_NET_NOT_READ} -location {${module_instance_name}_reg_top.sv} -regexp {error_log_flds_we\[4:1\]' is not read from in module} ${"\\"}
-comment "Internal register is accepted to not be read. Tracked in #25663."
68 changes: 68 additions & 0 deletions hw/ip_templates/racl_ctrl/racl_ctrl.core.tpl
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CAPI=2:
# Copyright lowRISC contributors (OpenTitan project).
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
name: ${instance_vlnv(f"lowrisc:ip:{module_instance_name}:0.1")}
description: "RACL Control permission IP"

filesets:
files_rtl:
depend:
- lowrisc:ip:tlul
- lowrisc:prim:mubi
- lowrisc:prim:all
- lowrisc:systems:top_racl_pkg
files:
- rtl/${module_instance_name}_reg_pkg.sv
- rtl/${module_instance_name}_reg_top.sv
- rtl/${module_instance_name}.sv
file_type: systemVerilogSource

files_verilator_waiver:
depend:
# common waivers
- lowrisc:lint:common
- lowrisc:lint:comportable
files:
- lint/racl_ctrl.vlt
file_type: vlt

files_ascentlint_waiver:
depend:
# common waivers
- lowrisc:lint:common
- lowrisc:lint:comportable
files:
- lint/racl_ctrl.waiver
file_type: waiver

files_veriblelint_waiver:
depend:
# common waivers
- lowrisc:lint:common
- lowrisc:lint:comportable

parameters:
SYNTHESIS:
datatype: bool
paramtype: vlogdefine

targets:
default: &default_target
filesets:
- tool_verilator ? (files_verilator_waiver)
- tool_ascentlint ? (files_ascentlint_waiver)
- tool_veriblelint ? (files_veriblelint_waiver)
- files_rtl
toplevel: ${module_instance_name}

lint:
<<: *default_target
default_tool: verilator
parameters:
- SYNTHESIS=true
tools:
verilator:
mode: lint-only
verilator_options:
- "-Wall"
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