This is an FPGA based microcomputer with a physical 65C02 central processor and an Artix 7 FPGA. This project is aimed at
- Learning FPGA based system design and interfacing with physical chips
- Learning basic microcomputer architecture
- Learning low level assembly.
The 65C02 was chosen partly for its simplicity and ease of programmability and partly for nostalgia. This family of CPUs is one of the great 8bit families which helped start the home computer revolution. The 6502 is found in the Apple I, Apple II, Atari 2600, and Nintendo Entertainment System. The 65C02 is the next generation of this chip, has the same instruction set (backward compatible) with some minor fixes and a few extra handy instructions. 65C02s in 40 pin dual inline packages (DIP) can be found online new for around $10 (as of 2023). The Western Design Center has C compilers and assemblers for all of its CPUs including the 65C02.
See the SieveOfEratosthenes make.bat file, this uses the WDC assembler and linker to generate both binary and Intel HEX versions of the executable. The Intel HEX format is then converted into a ROM.vhd file that can then be pasted into the ROM.vhd file in the FPGA project. Building the bit stream and pushing to the Baysis 3 will load this program for execution. To build the bit stream you will need the free version of Vivado from AMD Xilinx