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1. jared12222/eecs570_final jared12222/eecs570_final Public

   SystemVerilog 1

2. Large-Scale-Reconfigurable-Neuromorphic-Architecture Large-Scale-Reconfigurable-Neuromorphic-Architecture Public

   FPGA based design

   Verilog 5

3. Neural-Network-Models-in-Python Neural-Network-Models-in-Python Public

   Demonstration of several neural networks with the use of Python (Without Third-Party Frameworks).

   Python

4. Component-Labeler Component-Labeler Public

   A hardware implementation of component labeling

   Verilog 1

5. leetcode-progress-cpp leetcode-progress-cpp Public

   Showcasing my atrociously slow progress of plowing through leetcode questions in CPP.

   C++ 1