This design implements a linear 8-bit DAC suitable for dc and low-frequency inputs. An analog voltage is produced by connecting the encoder's outputs to a modified R-2R ladder on the PCB (see External Hardware). It achieves high-linearity by using segmented mismatch-shaping, so the DAC does not require matched resistors. The encoder provides 1st order mismatch and quantization noise shaping. With a clock frequency of 6.144 MHz and a lowpass filter corner of 24 kHz, the oversampling ratio (OSR) is 256.