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dudmuck edited this page Nov 9, 2013 · 6 revisions

This block detects the preamble, which is always at start of packet. It is specific to 2-(G)FSK, but not requiring 802.15.4g.

Correct functioning is essential for error-free packet reception.

It determines the frequency error (DC offset), and then uses that to determine the symbol boundary position (bit phase). See Unit Interval.

The sample point is then offset 0.5UI, which is sent to output of this block.


The input of this block is intended to be the quadrature demodulator block. The sensitivity (output level) of the quadrature demodulator is not important.

The output of this block is intended to drive the binary slicer block, which would drive the packet decoder.

The bit rate is fixed to the sample rate: bitrate = sample_rate / samples_per_symbol

Preamble detector is useful in range of 4 to 32 for samples_per_symbol.

This preamble detector currently does not attempt to correct for bit rate errors. 802.15.4g specifies bit rate accuracy of 300ppm.

A simple squelch block is generally advised on input to quadrature demodulator when receiving from a hardware radio source. This is because background noise can cause unwanted activity, such as spurious SFD matching.

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