Power

• Power settings are required for all power nets, both internal and external.
  Ex: VSS power 0
• Other internal and external nets may be set to specify minimum, maximum, and/or logic levels.
  Ex: A1 min@0 sim@0 [email protected]
• Nets may be specified at any level of the hierarchy or at the subcircuit level.
  Ex: VDD The top level VDD net
  /Xtop/VDD The VDD net at a deeper hierarchy level
  *(inv2)/VDD The VDD net in all instances of the inv2 subcircuit
• Macros can defined for use in calculations.
  Ex: #define Vth 0.2
bias min@Vth
• Top level nets without special characters automatically become macros.
  Ex: VDD power 1.2
  `VDDH power VDD/2
• Use port to define external min/max for input nets.
  Ex: A1 port min@VSS max@VDD
• Use resistor to force resistor calculations.
  Ex: R0 resistor
• Multiple settings for the same net are allowed if there is no conflict.
  Ex: A1 port min@VSS max@VDD
A1 sim@VSS
• Power can be grouped into families.
  Ex: #define family VDD_TOP VDD,VDDB
• Using macros also creates a family relationship.
  Ex: VDDA power VDD VDD and VDDA belong to the same family (VDD).
• Interaction between families can be restricted or prohibited.
  Ex: #define family VDD VDD,VDDA
VDDC prohibit@VDD Any connection from VDDC to VDD or VDDA is an error
  VDDB permit@VDD Any connection from VDDB to power other than VDD or VDDA is an error