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rockchip: Add support for FriendlyElec NanoPi R2S Plus
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...age/boot/uboot-rockchip/patches/303-rockchip-rk3328-Add-FriendlyARM-NanoPi-R2S-Plus.patch
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,242 @@ | ||
| From d6a55cc9e7e7d44b4b357818a9690e05af5d87e2 Mon Sep 17 00:00:00 2001 | ||
| From: Sergey Bostandzhyan <[email protected]> | ||
| Date: Fri, 1 Nov 2024 22:21:29 +0000 | ||
| Subject: [PATCH] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus | ||
|
|
||
| The R2S Plus is basically an R2S with additional eMMC. | ||
|
|
||
| The eMMC configuration for the DTS has been extracted and copied from | ||
| rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip | ||
| repository. | ||
|
|
||
| Signed-off-by: Sergey Bostandzhyan <[email protected]> | ||
| Link: https://lore.kernel.org/r/[email protected] | ||
| Signed-off-by: Heiko Stuebner <[email protected]> | ||
|
|
||
| [ upstream commit: b8c02878292200ebb5b4a8cfc9dbf227327908bd ] | ||
|
|
||
| (cherry picked from commit c9bf98827964441f4dd16faa45bd4046f472e693) | ||
| Signed-off-by: Jonas Karlman <[email protected]> | ||
| Reviewed-by: Kever Yang <[email protected]> | ||
| --- | ||
| .../arm64/rockchip/rk3328-nanopi-r2s-plus.dts | 32 +++++++++++++++++++ | ||
| 1 file changed, 32 insertions(+) | ||
| create mode 100644 dts/upstream/src/arm64/rockchip/rk3328-nanopi-r2s-plus.dts | ||
|
|
||
| diff --git a/dts/upstream/src/arm64/rockchip/rk3328-nanopi-r2s-plus.dts b/dts/upstream/src/arm64/rockchip/rk3328-nanopi-r2s-plus.dts | ||
| new file mode 100644 | ||
| index 000000000000..cb81ba3f23ff | ||
| --- /dev/null | ||
| +++ b/dts/upstream/src/arm64/rockchip/rk3328-nanopi-r2s-plus.dts | ||
| @@ -0,0 +1,32 @@ | ||
| +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| +/* | ||
| + * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd. | ||
| + * (http://www.friendlyarm.com) | ||
| + * | ||
| + * (C) Copyright 2016 Rockchip Electronics Co., Ltd | ||
| + */ | ||
| + | ||
| +/dts-v1/; | ||
| +#include "rk3328-nanopi-r2s.dts" | ||
| + | ||
| +/ { | ||
| + compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328"; | ||
| + model = "FriendlyElec NanoPi R2S Plus"; | ||
| + | ||
| + aliases { | ||
| + mmc1 = &emmc; | ||
| + }; | ||
| +}; | ||
| + | ||
| +&emmc { | ||
| + bus-width = <8>; | ||
| + cap-mmc-highspeed; | ||
| + disable-wp; | ||
| + mmc-hs200-1_8v; | ||
| + non-removable; | ||
| + num-slots = <1>; | ||
| + pinctrl-names = "default"; | ||
| + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; | ||
| + supports-emmc; | ||
| + status = "okay"; | ||
| +}; | ||
| From 3133b7c645157846590f6fc16e26f54d70f5e1d6 Mon Sep 17 00:00:00 2001 | ||
| From: Jonas Karlman <[email protected]> | ||
| Date: Fri, 1 Nov 2024 22:21:30 +0000 | ||
| Subject: [PATCH] board: rockchip: Add FriendlyElec NanoPi R2S Plus | ||
|
|
||
| The FriendlyElec NanoPi R2S Plus is a single-board computer based on | ||
| Rockchip RK3328 SoC. It features e.g. 1 GB DDR4 RAM, 32 GB eMMC, | ||
| SD-card, 2x GbE LAN, optional M.2 SDIO Wi-Fi and 2x USB 2.0 host. | ||
|
|
||
| Features tested on a NanoPi R2S Plus 2309: | ||
| - SD-card boot | ||
| - eMMC boot | ||
| - Ethernet | ||
| - USB gadget | ||
| - USB host | ||
|
|
||
| Signed-off-by: Jonas Karlman <[email protected]> | ||
| Reviewed-by: Kever Yang <[email protected]> | ||
| --- | ||
| .../dts/rk3328-nanopi-r2s-plus-u-boot.dtsi | 3 + | ||
| board/rockchip/evb_rk3328/MAINTAINERS | 6 + | ||
| configs/nanopi-r2s-plus-rk3328_defconfig | 108 ++++++++++++++++++ | ||
| doc/board/rockchip/rockchip.rst | 1 + | ||
| 4 files changed, 118 insertions(+) | ||
| create mode 100644 arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi | ||
| create mode 100644 configs/nanopi-r2s-plus-rk3328_defconfig | ||
|
|
||
| diff --git a/arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi | ||
| new file mode 100644 | ||
| index 000000000000..2ab32cf00a1d | ||
| --- /dev/null | ||
| +++ b/arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi | ||
| @@ -0,0 +1,3 @@ | ||
| +// SPDX-License-Identifier: GPL-2.0-or-later | ||
| + | ||
| +#include "rk3328-nanopi-r2s-u-boot.dtsi" | ||
| diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS | ||
| index 8f619e54e0e7..5f81be55b8e0 100644 | ||
| --- a/board/rockchip/evb_rk3328/MAINTAINERS | ||
| +++ b/board/rockchip/evb_rk3328/MAINTAINERS | ||
| @@ -28,6 +28,12 @@ F: configs/nanopi-r2s-rk3328_defconfig | ||
| F: arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | ||
| F: arch/arm/dts/rk3328-nanopi-r2s.dts | ||
|
|
||
| +NANOPI-R2S-PLUS-RK3328 | ||
| +M: Jonas Karlman <[email protected]> | ||
| +S: Maintained | ||
| +F: configs/nanopi-r2s-plus-rk3328_defconfig | ||
| +F: arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi | ||
| + | ||
| ORANGEPI-R1-PLUS-RK3328 | ||
| M: Tianling Shen <[email protected]> | ||
| S: Maintained | ||
| diff --git a/configs/nanopi-r2s-plus-rk3328_defconfig b/configs/nanopi-r2s-plus-rk3328_defconfig | ||
| new file mode 100644 | ||
| index 000000000000..6e6785fcc882 | ||
| --- /dev/null | ||
| +++ b/configs/nanopi-r2s-plus-rk3328_defconfig | ||
| @@ -0,0 +1,108 @@ | ||
| +CONFIG_ARM=y | ||
| +CONFIG_SKIP_LOWLEVEL_INIT=y | ||
| +CONFIG_COUNTER_FREQUENCY=24000000 | ||
| +CONFIG_ARCH_ROCKCHIP=y | ||
| +CONFIG_SPL_GPIO=y | ||
| +CONFIG_NR_DRAM_BANKS=1 | ||
| +CONFIG_SF_DEFAULT_SPEED=20000000 | ||
| +CONFIG_ENV_OFFSET=0x3F8000 | ||
| +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-nanopi-r2s-plus" | ||
| +CONFIG_DM_RESET=y | ||
| +CONFIG_ROCKCHIP_RK3328=y | ||
| +CONFIG_SYS_LOAD_ADDR=0x800800 | ||
| +CONFIG_DEBUG_UART_BASE=0xFF130000 | ||
| +CONFIG_DEBUG_UART_CLOCK=24000000 | ||
| +CONFIG_DEBUG_UART=y | ||
| +# CONFIG_ANDROID_BOOT_IMAGE is not set | ||
| +CONFIG_FIT=y | ||
| +CONFIG_FIT_VERBOSE=y | ||
| +CONFIG_SPL_FIT_SIGNATURE=y | ||
| +CONFIG_SPL_LOAD_FIT=y | ||
| +CONFIG_LEGACY_IMAGE_FORMAT=y | ||
| +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s-plus.dtb" | ||
| +# CONFIG_DISPLAY_CPUINFO is not set | ||
| +CONFIG_DISPLAY_BOARDINFO_LATE=y | ||
| +CONFIG_SPL_MAX_SIZE=0x40000 | ||
| +CONFIG_SPL_PAD_TO=0x7f8000 | ||
| +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set | ||
| +CONFIG_SPL_POWER=y | ||
| +CONFIG_SPL_ATF=y | ||
| +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y | ||
| +CONFIG_CMD_BOOTZ=y | ||
| +CONFIG_CMD_GPIO=y | ||
| +CONFIG_CMD_GPT=y | ||
| +CONFIG_CMD_MMC=y | ||
| +CONFIG_CMD_USB=y | ||
| +CONFIG_CMD_ROCKUSB=y | ||
| +CONFIG_CMD_USB_MASS_STORAGE=y | ||
| +# CONFIG_CMD_SETEXPR is not set | ||
| +CONFIG_CMD_TIME=y | ||
| +CONFIG_CMD_REGULATOR=y | ||
| +CONFIG_SPL_OF_CONTROL=y | ||
| +CONFIG_TPL_OF_CONTROL=y | ||
| +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" | ||
| +CONFIG_TPL_OF_PLATDATA=y | ||
| +CONFIG_ENV_IS_IN_MMC=y | ||
| +CONFIG_SYS_RELOC_GD_ENV_ADDR=y | ||
| +CONFIG_SYS_MMC_ENV_DEV=0 | ||
| +CONFIG_TPL_DM=y | ||
| +CONFIG_SPL_DM_SEQ_ALIAS=y | ||
| +CONFIG_REGMAP=y | ||
| +CONFIG_SPL_REGMAP=y | ||
| +CONFIG_TPL_REGMAP=y | ||
| +CONFIG_SYSCON=y | ||
| +CONFIG_SPL_SYSCON=y | ||
| +CONFIG_TPL_SYSCON=y | ||
| +CONFIG_CLK=y | ||
| +CONFIG_SPL_CLK=y | ||
| +CONFIG_FASTBOOT_BUF_ADDR=0x800800 | ||
| +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y | ||
| +CONFIG_ROCKCHIP_GPIO=y | ||
| +CONFIG_SYS_I2C_ROCKCHIP=y | ||
| +CONFIG_MMC_DW=y | ||
| +CONFIG_MMC_DW_ROCKCHIP=y | ||
| +CONFIG_PHY_MOTORCOMM=y | ||
| +CONFIG_PHY_REALTEK=y | ||
| +CONFIG_DM_MDIO=y | ||
| +CONFIG_DM_ETH_PHY=y | ||
| +CONFIG_PHY_GIGE=y | ||
| +CONFIG_ETH_DESIGNWARE=y | ||
| +CONFIG_GMAC_ROCKCHIP=y | ||
| +CONFIG_PHY_ROCKCHIP_INNO_USB2=y | ||
| +CONFIG_PINCTRL=y | ||
| +CONFIG_SPL_PINCTRL=y | ||
| +CONFIG_DM_PMIC=y | ||
| +CONFIG_PMIC_RK8XX=y | ||
| +CONFIG_SPL_DM_REGULATOR=y | ||
| +CONFIG_DM_REGULATOR_FIXED=y | ||
| +CONFIG_SPL_DM_REGULATOR_FIXED=y | ||
| +CONFIG_DM_REGULATOR_GPIO=y | ||
| +CONFIG_SPL_DM_REGULATOR_GPIO=y | ||
| +CONFIG_REGULATOR_RK8XX=y | ||
| +CONFIG_PWM_ROCKCHIP=y | ||
| +CONFIG_RAM=y | ||
| +CONFIG_SPL_RAM=y | ||
| +CONFIG_TPL_RAM=y | ||
| +CONFIG_DM_RNG=y | ||
| +CONFIG_RNG_ROCKCHIP=y | ||
| +CONFIG_BAUDRATE=1500000 | ||
| +CONFIG_DEBUG_UART_SHIFT=2 | ||
| +CONFIG_SYS_NS16550_MEM32=y | ||
| +CONFIG_SYSINFO=y | ||
| +CONFIG_SYSRESET=y | ||
| +# CONFIG_TPL_SYSRESET is not set | ||
| +CONFIG_USB=y | ||
| +CONFIG_DM_USB_GADGET=y | ||
| +CONFIG_USB_XHCI_HCD=y | ||
| +CONFIG_USB_EHCI_HCD=y | ||
| +CONFIG_USB_EHCI_GENERIC=y | ||
| +CONFIG_USB_OHCI_HCD=y | ||
| +CONFIG_USB_OHCI_GENERIC=y | ||
| +CONFIG_USB_DWC3=y | ||
| +CONFIG_USB_DWC3_GENERIC=y | ||
| +CONFIG_USB_GADGET=y | ||
| +CONFIG_USB_GADGET_DWC2_OTG=y | ||
| +CONFIG_USB_FUNCTION_ROCKUSB=y | ||
| +CONFIG_SPL_TINY_MEMSET=y | ||
| +CONFIG_TPL_TINY_MEMSET=y | ||
| +CONFIG_ERRNO_STR=y | ||
| diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst | ||
| index 3056e071f4ff..9bab86d23479 100644 | ||
| --- a/doc/board/rockchip/rockchip.rst | ||
| +++ b/doc/board/rockchip/rockchip.rst | ||
| @@ -65,6 +65,7 @@ List of mainline supported Rockchip boards: | ||
| - FriendlyElec NanoPi R2C (nanopi-r2c-rk3328) | ||
| - FriendlyElec NanoPi R2C Plus (nanopi-r2c-plus-rk3328) | ||
| - FriendlyElec NanoPi R2S (nanopi-r2s-rk3328) | ||
| + - FriendlyElec NanoPi R2S Plus (nanopi-r2s-plus-rk3328) | ||
| - Pine64 Rock64 (rock64-rk3328) | ||
| - Radxa ROCK Pi E (rock-pi-e-rk3328) | ||
| - Xunlong Orange Pi R1 Plus (orangepi-r1-plus-rk3328) |
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