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Our uvm bench for soc_ifc randomly set the lifecycle bits each test where they get stored in the CPTRA_SECURITY_STATE register.
I would need to check with the team that did JTAG testing to see if they tested JTAG enabling through lifecycle bits. None of our other content exercises this interface.
The spec inconsistency will be addressed soon also.
Hi Caliptra team,
Do you have any test for different life cycle inputs?
Lower 2 bits are mapped to device lifecycle (unprovisioned, manufacturing, production)
Thanks
Rohith
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