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Merge branch 'cram-udma-uart' into main
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bunnie committed Sep 15, 2023
2 parents 18017be + 7e8e9e3 commit 661b832
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Showing 15 changed files with 280 additions and 2,421 deletions.
31 changes: 26 additions & 5 deletions kernel/src/platform/cramium/uart.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,15 +9,15 @@ use crate::{
debug::shell::process_characters,
PID,
};
#[cfg(feature="cramium-fpga")]
use utralib::generated::*;
#[cfg(feature="cramium-fpga")]
use xous_kernel::{MemoryFlags, MemoryType};

#[cfg(feature="cramium-soc")]
use crate::{
io::{SerialWrite, SerialRead},
mem::MemoryManager,
debug::shell::process_characters,
PID,
};

/// UART virtual address.
Expand Down Expand Up @@ -136,7 +136,21 @@ pub fn init() {

#[cfg(feature="cramium-soc")]
pub fn init() { // there is no kernel UART yet...just a placeholder function
let uart = Uart::new(UART_ADDR, IRQ0_ADDR, process_characters);
// Map the UART peripheral.
MemoryManager::with_mut(|memory_manager| {
memory_manager
.map_range(
utra::duart::HW_DUART_BASE as *mut u8,
(UART_ADDR & !4095) as *mut u8,
4096,
PID::new(1).unwrap(),
MemoryFlags::R | MemoryFlags::W,
MemoryType::Default,
)
.expect("unable to map serial port")
});
let mut uart = Uart::new(UART_ADDR, IRQ0_ADDR, process_characters);
uart.init();
unsafe{
UART = Some(uart);
crate::debug::shell::init(UART.as_mut().unwrap());
Expand All @@ -145,19 +159,26 @@ pub fn init() { // there is no kernel UART yet...just a placeholder function

#[cfg(feature="cramium-soc")]
pub struct Uart {
uart_csr: CSR<u32>,
}

#[cfg(feature="cramium-soc")]
impl Uart {
pub fn new(_addr: usize, _irq_addr: usize, _callback: fn(&mut Self)) -> Uart {
pub fn new(addr: usize, _irq_addr: usize, _callback: fn(&mut Self)) -> Uart {
Uart {
uart_csr: CSR::new(addr as *mut u32),
}
}
pub fn init(&mut self) {
// duart requires no special initializations
}
}

#[cfg(feature="cramium-soc")]
impl SerialWrite for Uart {
fn putc(&mut self, _c: u8) {
fn putc(&mut self, c: u8) {
while self.uart_csr.r(utra::duart::SFR_SR) != 0 {}
self.uart_csr.wo(utra::duart::SFR_TXD, c as u32);
}
}

Expand Down
2 changes: 1 addition & 1 deletion libs/xous-pio/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ log = "0.4.14"
pio-proc = "0.2.2"
pio = "0.2.1"
defmt = {version ="0.3", optional = true}
utralib = {version = "0.1.23", optional = true, default-features = false }
utralib = {version = "0.1.23", default-features = false }

[target.'cfg(target_os = "xous")'.dependencies]
xous = "0.9.51"
Expand Down
5 changes: 2 additions & 3 deletions libs/xous-pio/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,9 +3,8 @@
use pio::Program;
use pio::RP2040_MAX_PROGRAM_SIZE;

mod pio_generated;
use pio_generated::utra::rp_pio;
use pio_generated::*;
use utralib::generated::*;
use utralib::generated::utra::rp_pio;

#[cfg(feature="tests")]
pub mod pio_tests;
Expand Down
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