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Stanford VLSI Research Group

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  1. Genesis2 Genesis2 Public

    A home for Genesis2 sources.

    Perl 35 11

  2. dragonphy2 dragonphy2 Public

    Open Source PHY v2

    SystemVerilog 21 3

  3. DaVE DaVE Public

    tools regarding on analog modeling, validation, and generation

    Python 17 7

  4. FP-Gen FP-Gen Public

    FPU Generator

    Perl 16 5

  5. JusTAG JusTAG Public

    A JTAG Register Map Generator

    Python 2 1

  6. scrape-spec scrape-spec Public

    Forked from yellekelyk/scrape-spec

    A scraper for tables on SPEC website

    Python

Repositories

Showing 7 of 7 repositories
  • dragonphy2 Public

    Open Source PHY v2

    StanfordVLSI/dragonphy2’s past year of commit activity
    SystemVerilog 21 Apache-2.0 3 35 2 Updated Apr 25, 2024
  • DaVE Public

    tools regarding on analog modeling, validation, and generation

    StanfordVLSI/DaVE’s past year of commit activity
    Python 17 7 2 1 Updated Apr 11, 2023
  • Genesis2 Public

    A home for Genesis2 sources.

    StanfordVLSI/Genesis2’s past year of commit activity
    Perl 35 11 0 0 Updated Jul 26, 2021
  • FP-Gen Public

    FPU Generator

    StanfordVLSI/FP-Gen’s past year of commit activity
    Perl 16 BSD-3-Clause 5 5 0 Updated Jul 19, 2021
  • JusTAG Public

    A JTAG Register Map Generator

    StanfordVLSI/JusTAG’s past year of commit activity
    Python 2 MIT 1 1 0 Updated Nov 4, 2020
  • RelaxedScoreboard Public

    Code for the Relaxed Scoreboard (a verification tool for complex memory models)

    StanfordVLSI/RelaxedScoreboard’s past year of commit activity
    0 1 0 1 Updated May 2, 2017
  • scrape-spec Public Forked from yellekelyk/scrape-spec

    A scraper for tables on SPEC website

    StanfordVLSI/scrape-spec’s past year of commit activity
    Python 0 1 0 0 Updated Apr 7, 2015

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