nrfx 2.4.0 release

CHANGELOG.md

@@ -1,6 +1,25 @@
 # Changelog
 All notable changes to this project are documented in this file.
 
+## [2.4.0] - 2020-11-13
+### Added
+- Added the channel allocator feature in the GPIOTE driver.
+- Added support for registers associated with the Direction Finding feature in the RADIO HAL.
+- Added support for the SUBSCRIBE and PUBLISH registers in the following HALs: AAR, CCM, ECB, RADIO, and RNG.
+- Added support for the LATENCY register present on nRF5340 in the GPIOTE driver and the GPIOTE HAL.
+- Implemented workaround for nRF53 Series anomaly 53 in the POWER driver.
+
+### Changed
+- Updated MDK to 8.37.0.
+
+### Fixed
+- Fixed unused parameters in the PPI, CLOCK, SPIM and POWER drivers to resolve compilation warnings, such as 'flags' in the SPIM driver.
+- Fixed a race condition in the COMP driver when interrupt occured before update of the driver internal state.
+- Fixed minor C++ compilation warnings in the drivers.
+- Fixed implementation of workaround for nRF52 Series anomaly 197 in the POWER HAL, which was applied in incorrect configuration.
+- Fixed implementation of workaround for nRF53 Series anomaly 4 in the CLOCK driver, which was applied in incorrect configuration.
+- Fixed the incorrect signature of the nrf_clock_alwaysrun_set() function.
+
 ## [2.3.0] - 2020-08-19
 ### Added
 - Added support for nRF52805.

doc/main_page.dox

@@ -37,6 +37,10 @@ In addition, the following locations should be specified as include paths
 [nrfx]/mdk
 @endcode
 
+@note nrfx API functions do not provide thread safety themselves. Users are responsible
+      for providing the proper synchronization of the nrfx function calls in a given environment
+      if those are to be used from different contexts.
+
 @section nrfx_irq_handlers IRQ handlers
 
 The IRQ handlers in all drivers are implemented as ordinary API functions

doc/nrfx.doxyfile

@@ -40,7 +40,7 @@ PROJECT_NAME           = "nrfx"
 
 ### EDIT THIS ###
 
-PROJECT_NUMBER         = "2.3"
+PROJECT_NUMBER         = "2.4"
 
 # Using the PROJECT_BRIEF tag one can provide an optional one line description
 # for a project that appears at the top of each page and should give viewer a

drivers/include/nrfx_clock.h

@@ -284,7 +284,7 @@ NRFX_STATIC_INLINE nrf_clock_hfclk_div_t nrfx_clock_divider_get(nrf_clock_domain
 #endif
         default:
             NRFX_ASSERT(0);
-            return 0;
+            return (nrf_clock_hfclk_div_t)0;
     }
 }
 #endif // NRF_CLOCK_HAS_HFCLK_DIV || NRF_CLOCK_HAS_HFCLK_192M

drivers/include/nrfx_gpiote.h

@@ -161,9 +161,9 @@ typedef struct
  */
 #define NRFX_GPIOTE_CONFIG_OUT_TASK_LOW              \
     {                                                \
+        .action     = NRF_GPIOTE_POLARITY_HITOLO,    \
         .init_state = NRF_GPIOTE_INITIAL_VALUE_HIGH, \
         .task_pin   = true,                          \
-        .action     = NRF_GPIOTE_POLARITY_HITOLO,    \
     }
 
 /**
@@ -188,6 +188,20 @@ typedef struct
         .task_pin   = true,                                                                     \
     }
 
+#if !defined (NRFX_GPIOTE_CHANNELS_USED) || defined(__NRFX_DOXYGEN__)
+/** @brief Bitmask that defines GPIOTE channels that are reserved for use outside of the nrfx library. */
+#define NRFX_GPIOTE_CHANNELS_USED 0
+#endif
+
+#if (GPIOTE_CH_NUM == 4) || defined(__NRFX_DOXYGEN__)
+/** @brief Bitfield representing all GPIOTE channels available to the application. */
+#define NRFX_GPIOTE_APP_CHANNELS_MASK ((uint32_t)0x0000000F & ~(NRFX_GPIOTE_CHANNELS_USED))
+#elif (GPIOTE_CH_NUM == 8)
+#define NRFX_GPIOTE_APP_CHANNELS_MASK ((uint32_t)0x000000FF & ~(NRFX_GPIOTE_CHANNELS_USED))
+#else
+#error Unsupported number of GPIOTE channels.
+#endif
+
 /** @brief Pin. */
 typedef uint32_t nrfx_gpiote_pin_t;
 
@@ -226,6 +240,30 @@ bool nrfx_gpiote_is_init(void);
 /** @brief Function for uninitializing the GPIOTE module. */
 void nrfx_gpiote_uninit(void);
 
+/**
+ * @brief Function for allocating a GPIOTE channel.
+ * @details This function allocates the first unused GPIOTE channel from
+ *          pool defined in @ref NRFX_GPIOTE_APP_CHANNELS_MASK.
+ *
+ * @param[out] p_channel Pointer to the GPIOTE channel that has been allocated.
+ *
+ * @retval NRFX_SUCCESS      The channel was successfuly allocated.
+ * @retval NRFX_ERROR_NO_MEM There is no available channel to be used.
+ */
+nrfx_err_t nrfx_gpiote_channel_alloc(uint8_t * p_channel);
+
+/**
+ * @brief Function for freeing a GPIOTE channel.
+ * @details This function frees a GPIOTE channel that was allocated using
+ *          @ref nrfx_gpiote_channel_alloc.
+ *
+ * @param[in] channel GPIOTE channel to be freed.
+ *
+ * @retval NRFX_SUCCESS             The channel was successfully freed.
+ * @retval NRFX_ERROR_INVALID_PARAM The channel is not user-configurable.
+ */
+nrfx_err_t nrfx_gpiote_channel_free(uint8_t channel);
+
 /**
  * @brief Function for initializing a GPIOTE output pin.
  * @details The output pin can be controlled by the CPU or by PPI. The initial
@@ -243,6 +281,25 @@ void nrfx_gpiote_uninit(void);
 nrfx_err_t nrfx_gpiote_out_init(nrfx_gpiote_pin_t                pin,
                                 nrfx_gpiote_out_config_t const * p_config);
 
+/**
+ * @brief Function for initializing a GPIOTE output pin with preallocated channel.
+ * @details The output pin can be controlled by PPI.
+ *
+ * @param[in] pin      Pin.
+ * @param[in] p_config Initial configuration.
+ * @param[in] channel  GPIOTE channel allocated with @ref nrfx_gpiote_channel_alloc.
+ *
+ * @retval NRFX_SUCCESS             Initialization was successful.
+ * @retval NRFX_ERROR_BUSY          The pin is already used.
+ * @retval NRFX_ERROR_INVALID_PARAM Pin is configured to not be controlled by
+                                    the GPIOTE task and cannot be used with
+                                    preallocated channel.
+                                    Use @ref nrfx_gpiote_out_init instead.
+ */
+nrfx_err_t nrfx_gpiote_out_prealloc_init(nrfx_gpiote_pin_t                pin,
+                                         nrfx_gpiote_out_config_t const * p_config,
+                                         uint8_t                          channel);
+
 /**
  * @brief Function for uninitializing a GPIOTE output pin.
  * @details The driver frees the GPIOTE channel if the output pin was using one.
@@ -380,6 +437,27 @@ nrfx_err_t nrfx_gpiote_in_init(nrfx_gpiote_pin_t               pin,
                                nrfx_gpiote_in_config_t const * p_config,
                                nrfx_gpiote_evt_handler_t       evt_handler);
 
+/**
+ * @brief Function for initializing a GPIOTE input pin with preallocated channel.
+ * @details The input pin can act in higher accuracy (high frequency clock required)
+ * mode.
+ *
+ * @param[in] pin         Pin.
+ * @param[in] p_config    Initial configuration.
+ * @param[in] channel     GPIOTE channel allocated with @ref nrfx_gpiote_channel_alloc.
+ * @param[in] evt_handler User function to be called when the configured transition occurs.
+ *
+ * @retval NRFX_SUCCESS             Initialization was successful.
+ * @retval NRFX_ERROR_BUSY          The pin is already used.
+ * @retval NRFX_ERROR_INVALID_PARAM Pin is configured to not be controlled by
+                                    the GPIOTE task and cannot be used with
+                                    preallocated channel.
+                                    Use @ref nrfx_gpiote_in_init instead.
+ */
+nrfx_err_t nrfx_gpiote_in_prealloc_init(nrfx_gpiote_pin_t               pin,
+                                        nrfx_gpiote_in_config_t const * p_config,
+                                        uint8_t                         channel,
+                                        nrfx_gpiote_evt_handler_t       evt_handler);
 /**
  * @brief Function for uninitializing a GPIOTE input pin.
  * @details The driver frees the GPIOTE channel if the input pin was using one.
@@ -474,8 +552,42 @@ void nrfx_gpiote_set_task_trigger(nrfx_gpiote_pin_t pin);
 void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_pin_t pin);
 #endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
 
-/** @} */
+#if NRF_GPIOTE_HAS_LATENCY
+/**
+ * @brief Function for setting the latency setting.
+ *
+ * @note Available for event mode with rising or falling edge detection on the pin.
+ *       Toggle task mode can only be used with low latency setting.
+ *
+ * @param[in] latency Latency setting to be set.
+ */
+NRFX_STATIC_INLINE void nrfx_gpiote_latency_set(nrf_gpiote_latency_t latency);
 
+/**
+ * @brief Function for retrieving the latency setting.
+ *
+ * @return Latency setting.
+ */
+NRFX_STATIC_INLINE nrf_gpiote_latency_t nrfx_gpiote_latency_get(void);
+#endif
+
+#ifndef NRFX_DECLARE_ONLY
+
+#if NRF_GPIOTE_HAS_LATENCY
+NRFX_STATIC_INLINE void nrfx_gpiote_latency_set(nrf_gpiote_latency_t latency)
+{
+    nrf_gpiote_latency_set(NRF_GPIOTE, latency);
+}
+
+NRFX_STATIC_INLINE nrf_gpiote_latency_t nrfx_gpiote_latency_get(void)
+{
+    return nrf_gpiote_latency_get(NRF_GPIOTE);
+}
+#endif // NRF_GPIOTE_HAS_LATENCY
+
+#endif // NRFX_DECLARE_ONLY
+
+/** @} */
 
 void nrfx_gpiote_irq_handler(void);
 

drivers/include/nrfx_lpcomp.h

@@ -76,15 +76,15 @@ typedef struct
     .hal    = {  NRF_LPCOMP_REF_SUPPLY_4_8,                        \
                  NRF_LPCOMP_DETECT_CROSS,                          \
                  NRF_LPCOMP_HYST_NOHYST },                         \
-    .input  = _input,                                              \
+    .input  = (nrf_lpcomp_input_t)_input,                          \
     .interrupt_priority = NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY  \
 }
 #else
 #define NRFX_LPCOMP_DEFAULT_CONFIG(_input)                         \
 {                                                                  \
     .hal    = {  NRF_LPCOMP_REF_SUPPLY_4_8,                        \
                  NRF_LPCOMP_DETECT_CROSS },                        \
-    .input  = _input,                                              \
+    .input  = (nrf_lpcomp_input_t)_input,                          \
     .interrupt_priority = NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY  \
 }
 #endif

drivers/include/nrfx_twis.h

@@ -161,8 +161,8 @@ typedef struct
 {                                                                \
     .addr               = { _addr, 0x00 },                       \
     .scl                = _pin_scl,                              \
-    .scl_pull           = NRF_GPIO_PIN_NOPULL,                   \
     .sda                = _pin_sda,                              \
+    .scl_pull           = NRF_GPIO_PIN_NOPULL,                   \
     .sda_pull           = NRF_GPIO_PIN_NOPULL,                   \
     .interrupt_priority = NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY  \
 }

drivers/src/nrfx_adc.c

@@ -302,7 +302,7 @@ void nrfx_adc_irq_handler(void)
     if (m_cb.p_buffer == NULL)
     {
         nrf_adc_event_clear(NRF_ADC, NRF_ADC_EVENT_END);
-        NRFX_LOG_DEBUG("Event: %s.",NRFX_LOG_ERROR_STRING_GET(NRF_ADC_EVENT_END));
+        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_ADC_EVENT_END));
         nrf_adc_int_disable(NRF_ADC, NRF_ADC_INT_END_MASK);
         nrf_adc_disable(NRF_ADC);
         nrfx_adc_evt_t evt;
@@ -315,7 +315,7 @@ void nrfx_adc_irq_handler(void)
     }
     else if (adc_sample_process())
     {
-        NRFX_LOG_DEBUG("Event: %s.", NRFX_LOG_ERROR_STRING_GET(NRF_ADC_EVENT_END));
+        NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_ADC_EVENT_END));
         nrf_adc_int_disable(NRF_ADC, NRF_ADC_INT_END_MASK);
         nrfx_adc_evt_t evt;
         evt.type = NRFX_ADC_EVT_DONE;

drivers/src/nrfx_clock.c

@@ -436,6 +436,8 @@ void nrfx_clock_calibration_timer_start(uint8_t interval)
     nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO);
     nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_CTTO_MASK);
     nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CTSTART);
+#else
+    (void)interval;
 #endif
 }
 
@@ -458,31 +460,46 @@ nrfx_err_t nrfx_clock_divider_set(nrf_clock_domain_t domain,
             switch (div)
             {
                 case NRF_CLOCK_HFCLK_DIV_2:
-                    NRFX_CRITICAL_SECTION_ENTER();
+#if !defined(NRF_TRUSTZONE_NONSECURE)
                     if (nrf53_errata_4())
                     {
+                        NRFX_CRITICAL_SECTION_ENTER();
                         __DSB();
-                    }
-                    nrf_clock_hfclk_div_set(NRF_CLOCK, div);
-                    if (nrf53_errata_4())
-                    {
+
+                        nrf_clock_hfclk_div_set(NRF_CLOCK, div);
+
                         *(volatile uint32_t *)0x5084450C = 0x0;
                         *(volatile uint32_t *)0x50026548 = 0x0;
                         *(volatile uint32_t *)0x50081EE4 = 0x0D;
+
+                        NRFX_CRITICAL_SECTION_EXIT();
+                    }
+                    else
+#endif
+                    {
+                        nrf_clock_hfclk_div_set(NRF_CLOCK, div);
                     }
-                    NRFX_CRITICAL_SECTION_EXIT();
                     break;
                 case NRF_CLOCK_HFCLK_DIV_1:
-                    NRFX_CRITICAL_SECTION_ENTER();
+#if !defined(NRF_TRUSTZONE_NONSECURE)
                     if (nrf53_errata_4())
                     {
+                        NRFX_CRITICAL_SECTION_ENTER();
                         __DSB();
+
                         *(volatile uint32_t *)0x5084450C = 0x4040;
                         *(volatile uint32_t *)0x50026548 = 0x40;
                         *(volatile uint32_t *)0x50081EE4 = 0x4D;
+
+                        nrf_clock_hfclk_div_set(NRF_CLOCK, div);
+
+                        NRFX_CRITICAL_SECTION_EXIT();
+                    }
+                    else
+#endif
+                    {
+                        nrf_clock_hfclk_div_set(NRF_CLOCK, div);
                     }
-                    nrf_clock_hfclk_div_set(NRF_CLOCK, div);
-                    NRFX_CRITICAL_SECTION_EXIT();
                     break;
                 default:
                     return NRFX_ERROR_INVALID_PARAM;

drivers/src/nrfx_comp.c

@@ -177,8 +177,8 @@ void nrfx_comp_start(uint32_t comp_int_mask, uint32_t comp_shorts_mask)
     NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED);
     nrf_comp_int_enable(NRF_COMP, comp_int_mask);
     nrf_comp_shorts_enable(NRF_COMP, comp_shorts_mask);
-    nrf_comp_task_trigger(NRF_COMP, NRF_COMP_TASK_START);
     m_state = NRFX_DRV_STATE_POWERED_ON;
+    nrf_comp_task_trigger(NRF_COMP, NRF_COMP_TASK_START);
     NRFX_LOG_INFO("Enabled.");
 }
 

drivers/src/nrfx_dppi.c

@@ -74,20 +74,21 @@ static bool group_is_allocated(nrf_dppi_channel_group_t group)
 void nrfx_dppi_free(void)
 {
     uint32_t mask = m_allocated_groups;
-    nrf_dppi_channel_group_t group = NRF_DPPI_CHANNEL_GROUP0;
+    uint8_t group_idx = NRF_DPPI_CHANNEL_GROUP0;
 
     // Disable all channels
     nrf_dppi_channels_disable(NRF_DPPIC, m_allocated_channels);
 
     // Clear all groups configurations
     while (mask)
     {
+        nrf_dppi_channel_group_t group = (nrf_dppi_channel_group_t)group_idx;
         if (mask & DPPI_BIT_SET(group))
         {
             nrf_dppi_group_clear(NRF_DPPIC, group);
             mask &= ~DPPI_BIT_SET(group);
         }
-        group++;
+        group_idx++;
     }
 
     // Clear all allocated channels.
@@ -184,7 +185,7 @@ nrfx_err_t nrfx_dppi_group_alloc(nrf_dppi_channel_group_t * p_group)
 
     // Get mask of available DPPI groups
     uint32_t remaining_groups = DPPI_AVAILABLE_GROUPS_MASK & ~(m_allocated_groups);
-    nrf_dppi_channel_group_t group = NRF_DPPI_CHANNEL_GROUP0;
+    uint8_t group_idx = NRF_DPPI_CHANNEL_GROUP0;
 
     if (!remaining_groups)
     {
@@ -194,11 +195,12 @@ nrfx_err_t nrfx_dppi_group_alloc(nrf_dppi_channel_group_t * p_group)
     }
 
     // Find first free group
-    while (!(remaining_groups & DPPI_BIT_SET(group)))
+    while (!(remaining_groups & DPPI_BIT_SET((nrf_dppi_channel_group_t)group_idx)))
     {
-        group++;
+        group_idx++;
     }
 
+    nrf_dppi_channel_group_t group = (nrf_dppi_channel_group_t)group_idx;
     m_allocated_groups |= DPPI_BIT_SET(group);
     *p_group = group;