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nrfx 2.7.0 release
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nika-nordic committed Dec 15, 2021
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10 changes: 10 additions & 0 deletions CHANGELOG.md
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@@ -1,6 +1,16 @@
# Changelog
All notable changes to this project are documented in this file.

## [2.7.0] - 2021-12-16
### Added
- Added new fields in the driver configuration structures to allow skipping GPIO and/or PSEL register configuration. Affected drivers: I2S, PDM, PWM, QDEC, QSPI, SPI, SPIM, SPIS, TWI, TWIM, TWIS, UART, UARTE.

### Changed
- Updated MDK to version 8.44.2.

### Fixed
- Fixed the inability to start subsequent simple mode conversion from the user callback context in the SAADC driver.

## [2.6.0] - 2021-11-22
### Added
- Added new functions for the GPIOTE peripheral management in the GPIOTE driver. Legacy API is now deprecated.
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2 changes: 1 addition & 1 deletion doc/nrfx.doxyfile
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Expand Up @@ -40,7 +40,7 @@ PROJECT_NAME = "nrfx"

### EDIT THIS ###

PROJECT_NUMBER = "2.6"
PROJECT_NUMBER = "2.7"

# Using the PROJECT_BRIEF tag one can provide an optional one line description
# for a project that appears at the top of each page and should give viewer a
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14 changes: 14 additions & 0 deletions drivers/include/nrfx_i2s.h
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Expand Up @@ -82,6 +82,20 @@ typedef struct
nrf_i2s_clksrc_t clksrc; ///< Clock source selection.
bool enable_bypass; ///< Bypass clock generator. MCK will be equal to source input.
#endif
bool skip_gpio_cfg; ///< Skip GPIO configuration of pins.
/**< When set to true, the driver does not modify
* any GPIO parameters of the used pins. Those
* parameters are supposed to be configured
* externally before the driver is initialized. */
bool skip_psel_cfg; ///< Skip pin selection configuration.
/**< When set to true, the driver does not modify
* pin select registers in the peripheral.
* Those registers are supposed to be set up
* externally before the driver is initialized.
* @note When both GPIO configuration and pin
* selection are to be skipped, the structure
* fields that specify pins can be omitted,
* as they are ignored anyway. */
} nrfx_i2s_config_t;

/** @brief I2S driver buffers structure. */
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14 changes: 14 additions & 0 deletions drivers/include/nrfx_pdm.h
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Expand Up @@ -83,6 +83,20 @@ typedef struct
#if NRF_PDM_HAS_MCLKCONFIG
nrf_pdm_mclksrc_t mclksrc; ///< Master clock source selection.
#endif
bool skip_gpio_cfg; ///< Skip GPIO configuration of pins.
/**< When set to true, the driver does not modify
* any GPIO parameters of the used pins. Those
* parameters are supposed to be configured
* externally before the driver is initialized. */
bool skip_psel_cfg; ///< Skip pin selection configuration.
/**< When set to true, the driver does not modify
* pin select registers in the peripheral.
* Those registers are supposed to be set up
* externally before the driver is initialized.
* @note When both GPIO configuration and pin
* selection are to be skipped, the structure
* fields that specify pins can be omitted,
* as they are ignored anyway. */
} nrfx_pdm_config_t;


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30 changes: 20 additions & 10 deletions drivers/include/nrfx_pwm.h
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Expand Up @@ -96,16 +96,26 @@ typedef struct
uint8_t output_pins[NRF_PWM_CHANNEL_COUNT]; ///< Pin numbers for individual output channels (optional).
/**< Use @ref NRFX_PWM_PIN_NOT_USED
* if a given output channel is not needed. */
uint8_t irq_priority; ///< Interrupt priority.
nrf_pwm_clk_t base_clock; ///< Base clock frequency.
nrf_pwm_mode_t count_mode; ///< Operating mode of the pulse generator counter.
uint16_t top_value; ///< Value up to which the pulse generator counter counts.
nrf_pwm_dec_load_t load_mode; ///< Mode of loading sequence data from RAM.
nrf_pwm_dec_step_t step_mode; ///< Mode of advancing the active sequence.
bool skip_gpio_cfg; ///< Skip the GPIO configuration
/**< When this flag is set, the user is responsible for
* providing the proper configuration of the output pins,
* as the driver does not touch it at all. */
uint8_t irq_priority; ///< Interrupt priority.
nrf_pwm_clk_t base_clock; ///< Base clock frequency.
nrf_pwm_mode_t count_mode; ///< Operating mode of the pulse generator counter.
uint16_t top_value; ///< Value up to which the pulse generator counter counts.
nrf_pwm_dec_load_t load_mode; ///< Mode of loading sequence data from RAM.
nrf_pwm_dec_step_t step_mode; ///< Mode of advancing the active sequence.
bool skip_gpio_cfg; ///< Skip GPIO configuration of pins.
/**< When set to true, the driver does not modify
* any GPIO parameters of the used pins. Those
* parameters are supposed to be configured
* externally before the driver is initialized. */
bool skip_psel_cfg; ///< Skip pin selection configuration.
/**< When set to true, the driver does not modify
* pin select registers in the peripheral.
* Those registers are supposed to be set up
* externally before the driver is initialized.
* @note When both GPIO configuration and pin
* selection are to be skipped, the structure
* fields that specify pins can be omitted,
* as they are ignored anyway. */
} nrfx_pwm_config_t;

/**
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34 changes: 24 additions & 10 deletions drivers/include/nrfx_qdec.h
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Expand Up @@ -51,16 +51,30 @@ extern "C" {
/** @brief QDEC configuration structure. */
typedef struct
{
nrf_qdec_reportper_t reportper; /**< Report period in samples. */
nrf_qdec_sampleper_t sampleper; /**< Sampling period in microseconds. */
uint32_t psela; /**< Pin number for A input. */
uint32_t pselb; /**< Pin number for B input. */
uint32_t pselled; /**< Pin number for LED output. */
uint32_t ledpre; /**< Time (in microseconds) how long LED is switched on before sampling. */
nrf_qdec_ledpol_t ledpol; /**< Active LED polarity. */
bool dbfen; /**< State of debouncing filter. */
bool sample_inten; /**< Enabling sample ready interrupt. */
uint8_t interrupt_priority; /**< QDEC interrupt priority. */
nrf_qdec_reportper_t reportper; ///< Report period in samples.
nrf_qdec_sampleper_t sampleper; ///< Sampling period in microseconds.
uint32_t psela; ///< Pin number for A input.
uint32_t pselb; ///< Pin number for B input.
uint32_t pselled; ///< Pin number for LED output.
uint32_t ledpre; ///< Time (in microseconds) how long LED is switched on before sampling.
nrf_qdec_ledpol_t ledpol; ///< Active LED polarity.
bool dbfen; ///< State of debouncing filter.
bool sample_inten; ///< Enabling sample ready interrupt.
uint8_t interrupt_priority; ///< QDEC interrupt priority.
bool skip_gpio_cfg; ///< Skip GPIO configuration of pins.
/**< When set to true, the driver does not modify
* any GPIO parameters of the used pins. Those
* parameters are supposed to be configured
* externally before the driver is initialized. */
bool skip_psel_cfg; ///< Skip pin selection configuration.
/**< When set to true, the driver does not modify
* pin select registers in the peripheral.
* Those registers are supposed to be set up
* externally before the driver is initialized.
* @note When both GPIO configuration and pin
* selection are to be skipped, the structure
* fields that specify pins can be omitted,
* as they are ignored anyway. */
} nrfx_qdec_config_t;

/**
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24 changes: 19 additions & 5 deletions drivers/include/nrfx_qspi.h
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Expand Up @@ -51,11 +51,25 @@ extern "C" {
/** @brief QSPI driver instance configuration structure. */
typedef struct
{
uint32_t xip_offset; /**< Address offset into the external memory for Execute in Place operation. */
nrf_qspi_pins_t pins; /**< Pin configuration structure. */
nrf_qspi_prot_conf_t prot_if; /**< Protocol layer interface configuration structure. */
nrf_qspi_phy_conf_t phy_if; /**< Physical layer interface configuration structure. */
uint8_t irq_priority; /**< Interrupt priority. */
uint32_t xip_offset; ///< Address offset into the external memory for Execute in Place operation.
nrf_qspi_pins_t pins; ///< Pin configuration structure.
nrf_qspi_prot_conf_t prot_if; ///< Protocol layer interface configuration structure.
nrf_qspi_phy_conf_t phy_if; ///< Physical layer interface configuration structure.
uint8_t irq_priority; ///< Interrupt priority.
bool skip_gpio_cfg; ///< Skip GPIO configuration of pins.
/**< When set to true, the driver does not modify
* any GPIO parameters of the used pins. Those
* parameters are supposed to be configured
* externally before the driver is initialized. */
bool skip_psel_cfg; ///< Skip pin selection configuration.
/**< When set to true, the driver does not modify
* pin select registers in the peripheral.
* Those registers are supposed to be set up
* externally before the driver is initialized.
* @note When both GPIO configuration and pin
* selection are to be skipped, the structure
* fields that specify pins can be omitted,
* as they are ignored anyway. */
} nrfx_qspi_config_t;

/**
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62 changes: 41 additions & 21 deletions drivers/include/nrfx_spi.h
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Expand Up @@ -88,27 +88,47 @@ enum {
/** @brief Configuration structure of the SPI master driver instance. */
typedef struct
{
uint8_t sck_pin; ///< SCK pin number.
uint8_t mosi_pin; ///< MOSI pin number (optional).
/**< Set to @ref NRFX_SPI_PIN_NOT_USED
* if this signal is not needed. */
uint8_t miso_pin; ///< MISO pin number (optional).
/**< Set to @ref NRFX_SPI_PIN_NOT_USED
* if this signal is not needed. */
uint8_t ss_pin; ///< Slave Select pin number (optional).
/**< Set to @ref NRFX_SPI_PIN_NOT_USED
* if this signal is not needed. The driver
* supports only active low for this signal.
* If the signal must be active high,
* it must be controlled externally. */
uint8_t irq_priority; ///< Interrupt priority.
uint8_t orc; ///< Overrun character.
/**< This character is used when all bytes from the TX buffer are sent,
but the transfer continues due to RX. */
nrf_spi_frequency_t frequency; ///< SPI frequency.
nrf_spi_mode_t mode; ///< SPI mode.
nrf_spi_bit_order_t bit_order; ///< SPI bit order.
nrf_gpio_pin_pull_t miso_pull; ///< MISO pull up configuration.
uint8_t sck_pin; ///< SCK pin number.
uint8_t mosi_pin; ///< MOSI pin number (optional).
/**< Set to @ref NRFX_SPI_PIN_NOT_USED
* if this signal is not needed. */
uint8_t miso_pin; ///< MISO pin number (optional).
/**< Set to @ref NRFX_SPI_PIN_NOT_USED
* if this signal is not needed. */
uint8_t ss_pin; ///< Slave Select pin number (optional).
/**< Set to @ref NRFX_SPI_PIN_NOT_USED
* if this signal is not needed. The driver
* supports only active low for this signal.
* If the signal must be active high,
* it must be controlled externally.
* @note Unlike the other fields that specify
* pin numbers, this one cannot be omitted
* when both GPIO configuration and pin
* selection are to be skipped, as the driver
* must control the signal as a regular GPIO. */
uint8_t irq_priority; ///< Interrupt priority.
uint8_t orc; ///< Overrun character.
/**< This character is used when all bytes from the TX buffer are sent,
* but the transfer continues due to RX. */
nrf_spi_frequency_t frequency; ///< SPI frequency.
nrf_spi_mode_t mode; ///< SPI mode.
nrf_spi_bit_order_t bit_order; ///< SPI bit order.
nrf_gpio_pin_pull_t miso_pull; ///< MISO pull up configuration.
bool skip_gpio_cfg; ///< Skip GPIO configuration of pins.
/**< When set to true, the driver does not modify
* any GPIO parameters of the used pins. Those
* parameters are supposed to be configured
* externally before the driver is initialized. */
bool skip_psel_cfg; ///< Skip pin selection configuration.
/**< When set to true, the driver does not modify
* pin select registers in the peripheral.
* Those registers are supposed to be set up
* externally before the driver is initialized.
* @note When both GPIO configuration and pin
* selection are to be skipped, the structure
* fields that specify pins can be omitted,
* as they are ignored anyway. This does not
* apply to the @p ss_pin field. */
} nrfx_spi_config_t;

/**
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