Исправление подключения сумматора в nexys_adder

MPSU · Sep 18, 2023 · e50170d · e50170d
1 parent 16b8370
commit e50170d
Showing 1 changed file with 6 additions and 6 deletions.
diff --git a/Labs/01. Adder/board files/nexys_adder.sv b/Labs/01. Adder/board files/nexys_adder.sv
@@ -30,12 +30,12 @@ reg [15:0] LEDr;
 
 fulladder32 DUT
 (
-  .A    (A),
-  .B    (B),
-  .Pin  (Pin),
+  .a_i     (A),
+  .b_i     (B),
+  .carry_i (Pin),
 
-  .S    (S),
-  .Pout (Pout)
+  .sum_o   (S),
+  .carry_o (Pout)
 );
 
 assign B = {24'b0,SW[7:0]};
@@ -127,4 +127,4 @@ always @(posedge CLK100) begin
     end
 end
 
-endmodule
+endmodule