i#2626: Add instructions and feature for AARCH64 FEAT_WFxT (#6842)

Add encoding for the WFIT and WFET instructions. Also add identification
of FEAT_WFxT as FEATURE_WFxT.

Issue: #2626

core/arch/aarch64/proc.c

@@ -234,6 +234,7 @@ proc_init_arch(void)
             cpu_info.features.isa_features[AA64ISAR2]);
         LOG_FEATURE(FEATURE_PAUTH2);
         LOG_FEATURE(FEATURE_CONSTPACFIELD);
+        LOG_FEATURE(FEATURE_WFxT);
 
         LOG(GLOBAL, LOG_TOP, 1, "ID_AA64MMFR2_EL1 = 0x%016lx\n",
             cpu_info.features.isa_features[AA64MMFR2]);
@@ -284,7 +285,7 @@ enable_all_test_cpu_features()
         FEATURE_SVEAES, FEATURE_SVEBitPerm, FEATURE_SVESHA3,       FEATURE_SVESM4,
         FEATURE_MTE,    FEATURE_BTI,        FEATURE_FRINTTS,       FEATURE_PAUTH2,
         FEATURE_MTE2,   FEATURE_FlagM2,     FEATURE_CONSTPACFIELD, FEATURE_SSBS,
-        FEATURE_SSBS2,  FEATURE_DIT,        FEATURE_LSE2
+        FEATURE_SSBS2,  FEATURE_DIT,        FEATURE_LSE2,          FEATURE_WFxT
     };
     for (int i = 0; i < BUFFER_SIZE_ELEMENTS(features); ++i) {
         proc_set_feature(features[i], true);

core/arch/proc_api.h

@@ -403,6 +403,9 @@ typedef enum {
     FEATURE_LSE2 =
         DEF_FEAT(AA64MMFR2, 8, 1,
                  FEAT_EQ), /**< Atomicity requirements for loads and stores (AArch64) */
+    FEATURE_WFxT =
+        DEF_FEAT(AA64ISAR2, 0, 2,
+                 FEAT_EQ), /**< Wait for event / interrupt with timeout (AArch64) */
 } feature_bit_t;
 
 #endif

core/ir/aarch64/codec.c

@@ -9748,6 +9748,7 @@ decode_category(uint encoding, instr_t *instr)
 #include "opnd_encode_funcs.h"
 #include "decode_gen_sve2.h"
 #include "decode_gen_sve.h"
+#include "decode_gen_v87.h"
 #include "decode_gen_v85.h"
 #include "decode_gen_v84.h"
 #include "decode_gen_v83.h"
@@ -9756,6 +9757,7 @@ decode_category(uint encoding, instr_t *instr)
 #include "decode_gen_v80.h"
 #include "encode_gen_sve2.h"
 #include "encode_gen_sve.h"
+#include "encode_gen_v87.h"
 #include "encode_gen_v85.h"
 #include "encode_gen_v84.h"
 #include "encode_gen_v83.h"

core/ir/aarch64/codec.py

@@ -670,7 +670,7 @@ def main():
     # and SVE2 are partially supported. The null terminator element at the end
     # is required by some generator functions to correctly generate links
     # between each version's decode/encode logic.
-    isa_versions = ['v80', 'v81', 'v82', 'v83', 'v84', 'v85', 'sve', 'sve2', '']
+    isa_versions = ['v80', 'v81', 'v82', 'v83', 'v84', 'v85', 'v87', 'sve', 'sve2', '']
 
     # Read the instruction operand definitions. Used by the codec when
     # generating code to decode and encode instructions.

core/ir/aarch64/codec_v87.txt

@@ -0,0 +1,40 @@
+# **********************************************************
+# Copyright (c) 2024 ARM Limited. All rights reserved.
+# **********************************************************
+
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice,
+#   this list of conditions and the following disclaimer.
+#
+# * Redistributions in binary form must reproduce the above copyright notice,
+#   this list of conditions and the following disclaimer in the documentation
+#   and/or other materials provided with the distribution.
+#
+# * Neither the name of ARM Limited nor the names of its contributors may be
+#   used to endorse or promote products derived from this software without
+#   specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL ARM LIMITED OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+# DAMAGE.
+
+# This file defines instruction encodings for v8.7 instructions.
+
+# See header comments in codec_v80.txt and opnd_defs.txt to understand how
+# instructions are defined for the purposes of decode and encode code
+# generation.
+
+# Instruction definitions:
+
+110101010000001100010000000xxxxx  n   1221 WFxT     wfet          : x0
+110101010000001100010000001xxxxx  n   1222 WFxT     wfit          : x0

core/ir/aarch64/instr_create_api.h

@@ -18409,4 +18409,51 @@
  * \param dc   The void * dcontext used to allocate memory for the #instr_t.
  */
 #define INSTR_CREATE_xaflag(dc) instr_create_0dst_0src(dc, OP_xaflag)
+
+/**
+ * Creates a WFE instruction.
+ *
+ * This macro is used to encode the forms:
+   \verbatim
+      WFE
+   \endverbatim
+ * \param dc   The void * dcontext used to allocate memory for the #instr_t.
+ */
+#define INSTR_CREATE_wfe(dc) instr_create_0dst_0src(dc, OP_wfe)
+
+/**
+ * Creates a WFI instruction.
+ *
+ * This macro is used to encode the forms:
+   \verbatim
+      WFI
+   \endverbatim
+ * \param dc   The void * dcontext used to allocate memory for the #instr_t.
+ */
+#define INSTR_CREATE_wfi(dc) instr_create_0dst_0src(dc, OP_wfi)
+
+/**
+ * Creates a WFET instruction.
+ *
+ * This macro is used to encode the forms:
+ * \verbatim
+ *    WFET   <Xt>
+ * \endverbatim
+ * \param dc   The void * dcontext used to allocate memory for the #instr_t.
+ * \param Rt   The source register, X (Extended, 64 bits).
+ */
+#define INSTR_CREATE_wfet(dc, Rt) instr_create_0dst_1src(dc, OP_wfet, Rt)
+
+/**
+ * Creates a WFIT instruction.
+ *
+ * This macro is used to encode the forms:
+ * \verbatim
+ *    WFIT   <Xt>
+ * \endverbatim
+ * \param dc   The void * dcontext used to allocate memory for the #instr_t.
+ * \param Rt   The source register, X (Extended, 64 bits).
+ */
+#define INSTR_CREATE_wfit(dc, Rt) instr_create_0dst_1src(dc, OP_wfit, Rt)
+
 #endif /* DR_IR_MACROS_AARCH64_H */

make/CMake_aarch64_gen_codec.cmake

@@ -44,12 +44,18 @@ set(AARCH64_CODEC_GEN_SRCS
   ${PROJECT_BINARY_DIR}/decode_gen_v81.h
   ${PROJECT_BINARY_DIR}/decode_gen_v82.h
   ${PROJECT_BINARY_DIR}/decode_gen_v83.h
+  ${PROJECT_BINARY_DIR}/decode_gen_v84.h
+  ${PROJECT_BINARY_DIR}/decode_gen_v85.h
+  ${PROJECT_BINARY_DIR}/decode_gen_v87.h
   ${PROJECT_BINARY_DIR}/decode_gen_sve.h
   ${PROJECT_BINARY_DIR}/decode_gen_sve2.h
   ${PROJECT_BINARY_DIR}/encode_gen_v80.h
   ${PROJECT_BINARY_DIR}/encode_gen_v81.h
   ${PROJECT_BINARY_DIR}/encode_gen_v82.h
   ${PROJECT_BINARY_DIR}/encode_gen_v83.h
+  ${PROJECT_BINARY_DIR}/encode_gen_v84.h
+  ${PROJECT_BINARY_DIR}/encode_gen_v85.h
+  ${PROJECT_BINARY_DIR}/encode_gen_v87.h
   ${PROJECT_BINARY_DIR}/encode_gen_sve.h
   ${PROJECT_BINARY_DIR}/encode_gen_sve2.h
   ${PROJECT_BINARY_DIR}/opcode_names.h
@@ -82,6 +88,7 @@ add_custom_command(
           ${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_v83.txt
           ${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_v84.txt
           ${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_v85.txt
+          ${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_v87.txt
           ${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_sve.txt
           ${PROJECT_SOURCE_DIR}/core/ir/${ARCH_NAME}/codec_sve2.txt
   COMMAND ${PYTHON_EXECUTABLE}

make/aarch64_check_codec_order.py

@@ -110,7 +110,7 @@ def main():
     # The Arm AArch64's architecture versions supported by the DynamoRIO codec.
     # Currently, v8.0 is fully supported, while v8.1, v8.2, v8.3, v8.4, v8.5,
     # SVE, and SVE2 are partially supported.
-    isa_versions = ['v80', 'v81', 'v82', 'v83', 'v84', 'v85', 'sve', 'sve2']
+    isa_versions = ['v80', 'v81', 'v82', 'v83', 'v84', 'v85', 'v87', 'sve', 'sve2']
 
     codecsort_py = os.path.join(src_dir, "codecsort.py")
 

suite/tests/CMakeLists.txt

@@ -490,7 +490,7 @@ endfunction(append_link_flags)
 # TODO i#6429 Change this allowlist to a blocklist.
 set(sve_tests
       simple_app api.ir api.ir_negative api.ir_v81 api.ir_v82 api.ir_v83 api.ir_v84
-      api.ir_v85 api.ir_sve api.ir_sve2 api.ir-static api.drdecode
+      api.ir_v85 api.ir_v87 api.ir_sve api.ir_sve2 api.ir-static api.drdecode
       common.broadfun common.nzcv common.getretaddr common.segfault
       common.allasm_aarch64_isa common.allasm_aarch64_cache allasm_aarch64_prefetch
       allasm_aarch64_flush libutil.frontend_test libutil.drconfig_test
@@ -2032,6 +2032,7 @@ if (NOT ANDROID)
     tobuild_api(api.ir_v83 api/ir_aarch64_v83.c "" "" OFF OFF OFF)
     tobuild_api(api.ir_v84 api/ir_aarch64_v84.c "" "" OFF OFF OFF)
     tobuild_api(api.ir_v85 api/ir_aarch64_v85.c "" "" OFF OFF OFF)
+    tobuild_api(api.ir_v87 api/ir_aarch64_v87.c "" "" OFF OFF OFF)
     tobuild_api(api.ir_sve api/ir_aarch64_sve.c "" "" OFF OFF OFF)
     tobuild_api(api.ir_sve2 api/ir_aarch64_sve2.c "" "" OFF OFF OFF)
   endif (AARCH64)
@@ -3247,6 +3248,8 @@ elseif (AARCH64)
     "-q;${CMAKE_CURRENT_SOURCE_DIR}/api/dis-a64-v84.txt" OFF OFF)
   torunonly_api(api.dis-a64-v85 api.dis-a64 api/dis-a64.c ""
     "-q;${CMAKE_CURRENT_SOURCE_DIR}/api/dis-a64-v85.txt" OFF OFF)
+  torunonly_api(api.dis-a64-v87 api.dis-a64 api/dis-a64.c ""
+    "-q;${CMAKE_CURRENT_SOURCE_DIR}/api/dis-a64-v87.txt" OFF OFF)
   torunonly_api(api.dis-a64-sve api.dis-a64 api/dis-a64.c ""
     "-q;${CMAKE_CURRENT_SOURCE_DIR}/api/dis-a64-sve.txt" OFF OFF)
   torunonly_api(api.dis-a64-sve2 api.dis-a64 api/dis-a64.c ""

suite/tests/api/dis-a64-v87.txt

@@ -0,0 +1,45 @@
+# **********************************************************
+# Copyright (c) 2024 ARM Limited. All rights reserved.
+# **********************************************************
+
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice,
+#   this list of conditions and the following disclaimer.
+#
+# * Redistributions in binary form must reproduce the above copyright notice,
+#   this list of conditions and the following disclaimer in the documentation
+#   and/or other materials provided with the distribution.
+#
+# * Neither the name of ARM Limited nor the names of its contributors may be
+#   used to endorse or promote products derived from this software without
+#   specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL ARM LIMITED OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+# DAMAGE.
+
+# Test data for DynamoRIO's AArch64 v8.7 encoder, decoder and disassembler.
+# See dis-a64-sve.txt for the formatting.
+
+# Tests:
+# WFET <Xt>
+d5031000 : wfet x0                         : wfet   %x0
+d5031002 : wfet x2                         : wfet   %x2
+d503100A : wfet x10                        : wfet   %x10
+d503101E : wfet x30                        : wfet   %x30
+
+# WFIT <Xt>
+d5031020 : wfit x0                         : wfit   %x0
+d5031025 : wfit x5                         : wfit   %x5
+d5031030 : wfit x16                        : wfit   %x16
+d503103b : wfit x27                        : wfit   %x27

suite/tests/api/ir_aarch64_v80.c

@@ -319,6 +319,18 @@ TEST_INSTR(msr)
         });
 }
 
+TEST_INSTR(wfe)
+{
+    /* Testing WFE */
+    TEST_LOOP_EXPECT(wfe, 1, INSTR_CREATE_wfe(dc), EXPECT_DISASSEMBLY("wfe"));
+}
+
+TEST_INSTR(wfi)
+{
+    /* Testing WFI */
+    TEST_LOOP_EXPECT(wfi, 1, INSTR_CREATE_wfi(dc), EXPECT_DISASSEMBLY("wfi"));
+}
+
 int
 main(int argc, char *argv[])
 {
@@ -336,6 +348,9 @@ main(int argc, char *argv[])
     RUN_INSTR_TEST(mrs);
     RUN_INSTR_TEST(msr);
 
+    RUN_INSTR_TEST(wfe);
+    RUN_INSTR_TEST(wfi);
+
     print("All v8.0 tests complete.\n");
 #ifndef STANDALONE_DECODER
     dr_standalone_exit();

suite/tests/api/ir_aarch64_v87.c

@@ -0,0 +1,91 @@
+/* **********************************************************
+ * Copyright (c) 2024 ARM Limited. All rights reserved.
+ * **********************************************************/
+
+/*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright notice,
+ *   this list of conditions and the following disclaimer in the documentation
+ *   and/or other materials provided with the distribution.
+ *
+ * * Neither the name of ARM Limited nor the names of its contributors may be
+ *   used to endorse or promote products derived from this software without
+ *   specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL ARM LIMITED OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/* Define DR_FAST_IR to verify that everything compiles when we call the inline
+ * versions of these routines.
+ */
+#ifndef STANDALONE_DECODER
+#    define DR_FAST_IR 1
+#endif
+
+/* Uses the DR API, using DR as a standalone library, rather than
+ * being a client library working with DR on a target program.
+ */
+
+#include "configure.h"
+#include "dr_api.h"
+#include "tools.h"
+
+#include "ir_aarch64.h"
+
+TEST_INSTR(wfet)
+{
+    /* Testing WFET <Xt> */
+    const char *const expected_0_0[6] = { "wfet   %x0",  "wfet   %x5",  "wfet   %x10",
+                                          "wfet   %x15", "wfet   %x20", "wfet   %x30" };
+    TEST_LOOP(wfet, wfet, 6, expected_0_0[i], opnd_create_reg(Xn_six_offset_0[i]));
+}
+
+TEST_INSTR(wfit)
+{
+    /* Testing WFIT <Xt> */
+    const char *const expected_0_0[6] = { "wfit   %x0",  "wfit   %x5",  "wfit   %x10",
+                                          "wfit   %x15", "wfit   %x20", "wfit   %x30" };
+    TEST_LOOP(wfit, wfit, 6, expected_0_0[i], opnd_create_reg(Xn_six_offset_0[i]));
+}
+
+int
+main(int argc, char *argv[])
+{
+#ifdef STANDALONE_DECODER
+    void *dcontext = GLOBAL_DCONTEXT;
+#else
+    void *dcontext = dr_standalone_init();
+#endif
+    bool result = true;
+    bool test_result;
+    instr_t *instr;
+
+    enable_all_test_cpu_features();
+
+    /* FEAT_WFxT */
+    RUN_INSTR_TEST(wfet);
+    RUN_INSTR_TEST(wfit);
+
+    print("All v8.7 tests complete.\n");
+#ifndef STANDALONE_DECODER
+    dr_standalone_exit();
+#endif
+    if (result)
+        return 0;
+    return 1;
+}

suite/tests/api/ir_aarch64_v87.expect

@@ -0,0 +1 @@
+All v8.7 tests complete.