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Addressed code-review feedback on better comments.
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@edeiana
edeiana committed Apr 24, 2024
1 parent 967afe6 commit 42af79e
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Showing 7 changed files with 295 additions and 278 deletions.
271 changes: 0 additions & 271 deletions core/arch/arch.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,6 @@
#include "decode.h"
#include "decode_fast.h"
#include "../fcache.h"
#include "opnd_api.h"
#include "proc.h"
#include "instrument.h"

Expand Down Expand Up @@ -677,280 +676,10 @@ far_ibl_set_targets(ibl_code_t src_ibl[], ibl_code_t tgt_ibl[])
}
#endif

/* We can't compare DR_REG_V and DR_REG_ enum values directly because they belong to
* different enums and we build with -Werror=enum-compare. So we use scopes and the
* temporary variable reg_virtual.
*/
#define ASSERT_NOT_NULL_OR_INVALID(x) \
do { \
reg_id_t reg_virtual = x; \
ASSERT((reg_virtual != DR_REG_NULL) && (reg_virtual != DR_REG_INVALID)); \
} while (0);

/* We can't loop through DR_REG_V enums because we have a gap for value 187
* (== DR_REG_INVALID for x86), so we unroll the loop and compare every enum manually.
*/
#define CHECK_VIRTUAL_REGISTER_IDS \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V0) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V1) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V2) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V3) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V4) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V5) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V6) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V7) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V8) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V9) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V10) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V11) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V12) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V13) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V14) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V15) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V16) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V17) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V18) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V19) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V20) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V21) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V22) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V23) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V24) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V25) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V26) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V27) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V28) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V29) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V30) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V31) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V32) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V33) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V34) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V35) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V36) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V37) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V38) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V39) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V40) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V41) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V42) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V43) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V44) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V45) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V46) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V47) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V48) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V49) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V50) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V51) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V52) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V53) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V54) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V55) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V56) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V57) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V58) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V59) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V60) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V61) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V62) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V63) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V64) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V65) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V66) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V67) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V68) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V69) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V70) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V71) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V72) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V73) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V74) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V75) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V76) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V77) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V78) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V79) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V80) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V81) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V82) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V83) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V84) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V85) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V86) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V87) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V88) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V89) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V90) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V91) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V92) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V93) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V94) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V95) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V96) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V97) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V98) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V99) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V100) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V101) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V102) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V103) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V104) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V105) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V106) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V107) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V108) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V109) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V110) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V111) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V112) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V113) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V114) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V115) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V116) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V117) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V118) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V119) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V120) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V121) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V122) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V123) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V124) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V125) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V126) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V127) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V128) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V129) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V130) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V131) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V132) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V133) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V134) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V135) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V136) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V137) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V138) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V139) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V140) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V141) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V142) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V143) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V144) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V145) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V146) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V147) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V148) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V149) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V150) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V151) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V152) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V153) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V154) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V155) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V156) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V157) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V158) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V159) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V160) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V161) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V162) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V163) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V164) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V165) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V166) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V167) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V168) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V169) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V170) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V171) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V172) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V173) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V174) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V175) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V176) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V177) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V178) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V179) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V180) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V181) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V182) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V183) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V184) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V185) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V186) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V187) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V188) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V189) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V190) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V191) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V192) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V193) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V194) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V195) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V196) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V197) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V198) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V199) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V200) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V201) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V202) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V203) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V204) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V205) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V206) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V207) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V208) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V209) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V210) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V211) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V212) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V213) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V214) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V215) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V216) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V217) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V218) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V219) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V220) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V221) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V222) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V223) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V224) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V225) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V226) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V227) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V228) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V229) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V230) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V231) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V232) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V233) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V234) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V235) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V236) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V237) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V238) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V239) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V240) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V241) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V242) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V243) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V244) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V245) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V246) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V247) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V248) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V249) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V250) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V251) \
ASSERT_NOT_NULL_OR_INVALID(DR_REG_V252)

/* arch-specific initializations */

void
d_r_arch_init(void)
{
DOCHECK(1, { CHECK_VIRTUAL_REGISTER_IDS; });
ASSERT(sizeof(opnd_t) == EXPECTED_SIZEOF_OPND);
IF_X86(ASSERT(CHECK_TRUNCATE_TYPE_byte(OPSZ_LAST)));
/* This ensures that DR_REG_ enums that may be used as opnd_size_t fit its size.
Expand Down
2 changes: 1 addition & 1 deletion core/ir/instr_shared.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3108,7 +3108,7 @@ instr_convert_to_isa_regdeps(void *drcontext, instr_t *instr_real_isa,
* instructions may have different sizes.
*
* Even though querying the size of a virtual register is not supported on
* purpose (a user should query the instr_t.operation_size); we set the
* purpose (a user should query the instr_t.operation_size), we set the
* opnd_t.size field to be the same as instr_t.operation_size (i.e.,
* max_opnd_size), so that reg_get_size() can return some meaningful
* information without triggering a CLIENT_ASSERT error because the
Expand Down
2 changes: 1 addition & 1 deletion core/ir/isa_regdeps/decode.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -103,7 +103,7 @@ decode_isa_regdeps(dcontext_t *dcontext, byte *encoded_instr, instr_t *instr)
* instructions may have different sizes.
*
* Even though querying the size of a virtual register is not supported on
* purpose (a user should query the instr_t.operation_size); we set the
* purpose (a user should query the instr_t.operation_size), we set the
* opnd_t.size field to be the same as instr_t.operation_size (i.e.,
* max_opnd_size), so that reg_get_size() can return some meaningful
* information without triggering a CLIENT_ASSERT error because the
Expand Down
3 changes: 2 additions & 1 deletion core/ir/isa_regdeps/encoding_common.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,8 @@
* DAMAGE.
*/

/* Keep d_r_reg_virtual_names[] and DR_REG_V* enum in core/ir/opnd_api.h synched.
/* Keep this array (d_r_reg_virtual_names[]) and DR_REG_V enum in core/ir/opnd_api.h
* synched.
*/
const char *const d_r_reg_virtual_names[] = {
"rv_null", "rv_invalid", "rv0", "rv1", "rv2", "rv3", "rv4", "rv5",
Expand Down
2 changes: 1 addition & 1 deletion core/ir/opnd_api.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3267,7 +3267,7 @@ DR_API
* Assumes that \p reg is a DR_REG_ 32-bit register constant.
* Returns the string name for \p reg.
* \note It uses the global dcontext_t to determine the ISA mode. If the ISA mode is a
* synthetic one (e.g., #DR_ISA_REGDEPS), it returns the name of a DR_REG_V virtual
* synthetic one (e.g., #DR_ISA_REGDEPS), it returns the name of a #DR_REG_V0 etc. virtual
* register.
*/
const char *
Expand Down
17 changes: 14 additions & 3 deletions core/ir/opnd_shared.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2405,12 +2405,23 @@ opnd_compute_address(opnd_t opnd, dr_mcontext_t *mc)
*** Register utility functions
***************************************************************************/

/* XXX i#1684: performance matters on all getter and setter routines. Now that we call
* get_thread_private_dcontext(), we add non-negligible overhead to get_register_name().
* Currently there are other routines that call get_thread_private_dcontext() such as:
* instr_get_eflags() and opnd_create_far_abs_addr(). We should revisit this and make
* a decision on which of these routines should take dcontext_t as input argument.
*/
/* XXX i#6690: here we assume that changes made by the user of this routine
* (and by its threads) to the global dcontext_t (and specifically its isa_mode)
* are guarded by locks. We can remove this assumption once we have a completely
* lock-free dcontext_t.
*/
const char *
get_register_name(reg_id_t reg)
{
dcontext_t *dcontext = get_thread_private_dcontext();
bool is_isa_mode_synthetic = dr_get_isa_mode(dcontext) == DR_ISA_REGDEPS;
if (is_isa_mode_synthetic)
bool is_global_isa_mode_synthetic =
dr_get_isa_mode(get_thread_private_dcontext()) == DR_ISA_REGDEPS;
if (is_global_isa_mode_synthetic)
return d_r_reg_virtual_names[reg];
return reg_names[reg];
}
Expand Down
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