Merge branch 'R-base' of https://github.com/atndko/Neptune_kernel_sm8…

…150_oneplus into R

* 'R-base' of https://github.com/atndko/Neptune_kernel_sm8150_oneplus:
  version: bump
  qemu: increase default dmesg log size
  qemu: add disgusting hacks for RHEL 8
  allowedips: add missing __rcu annotation to satisfy sparse
  allowedips: free empty intermediate nodes when removing single node
  allowedips: allocate nodes in kmem_cache
  allowedips: remove nodes in O(1)
  allowedips: initialize list head in selftest
  peer: allocate in kmem_cache
  global: use synchronize_net rather than synchronize_rcu
  kbuild: do not use -O3
  netns: make sure rp_filter is disabled on vethc
  fuse: Set fuse request error upon fuse abort connection
  msm: adsprpc: Clean buffers on remote invocation failure
  Release 5.2.022.7Z
  qcacld-3.0: Drop mcast and plaintext frags in protected network
  Release 5.2.022.7Y
  qcacld-3.0: wma_send_peer_assoc() sets incorrect peer state
  qcacld-3.0: Drop EAPOL frame with DA different from SAP vdev mac addr
  qcacld-3.0: Enable config flag to disable EAPOL intrabss fwd
  qcacld-3.0: Flush frags for peer on add key request
  qcacld-3.0: Add support to flush fragments for a particular peer
  qcacmn: Drop fragmented multicast/broadcast frames
  qcacmn: Enable peer authorize by default
  qcacmn: Do not intrabss forward EAPOL frames
  qcacmn: Modify check to ensure consecutive PN for frags
  qcacmn: Register API to flush frags in dp peer ops
  qcacmn: Add CDP intf to flush fragments for a particular peer
  Release 5.2.022.7X
  qcacld-3.0: Do not intrabss fwd EAPOL frames in IPA exc path
  qcacld-3.0: Drop non-EAPOL/WAPI frames from unauthorized peer
  Release 5.2.022.7W
  qcacld-3.0: Reject pre CAC request when DBS is not supported
  Release 5.2.022.7V
  qcacld-3.0: Do not intrabss fwd frag EAPOL frames in HL
  qcacld-3.0: Do not intrabss forward fragmented EAPOL frames
  Release 5.2.022.7U
  qcacld-3.0: Modify check to ensure consecutive PN for frags
  qcacmn: Do not drop the beacon in case of RSN len is less than 2
  Release 5.2.022.7T
  qcacld-3.0: Set HIF PM link state on in RTPM suspend failure flow
  Release 5.2.022.7S
  usb: dwc3: Avoid resume_work flush in pm_freeze/restore
  msm: adsprpc: fix compilation errors in fastrpc driver
  msm: adsprpc: remove PM vote counter in fastrpc driver
  msm: adsprpc: do pm stay awake vote in rpmsg callback
  soc: qcom: hgsl: Fix OOB
  qcacmn: Get vdev based on vdev id
  usb: gadget: f_cdev: Fix use after free of port in f_cdev
  usb: dwc3: Avoid resume_work flush in pm_suspend/pm_resume
  disp: msm: avoid removing BW vote when layers are staged
  disp: msm: increase delay times while waiting to turn off rscc clocks
  qcacld-3.0: Stop opportunistic timer for NAN cmds in HL platforms
  disp: msm: update min prefill lines for sde rsc rev3
  disp: msm: avoid vsync wait during dms mode switch
  disp: msm: increase rsc min_threshold time
  disp: msm: update clk and cmd state switch sequence
  disp: msm: sde: update BW_INDICATION programing sequence
  tty: Fix ->pgrp locking in tiocspgrp()
  msm: adsprpc: vote for CPU to stay awake during RPC call
  disp: msm: sde: add msm_preclose operation as part of msm_release
  disp: msm: sde: remove fb's attached to a drm_file in preclose
  disp: msm: sde: clear dim_layers as part of null commit
  diag: Use valid data_source for a valid token
  disp: msm: sde: add helper function for setting crtc to conn state
  disp: msm: avoid deadlock by prepending connection_mutex
  dmabuf: fix use-after-free of dmabuf's file->f_inode
  dma-buf: Move dma_buf_release() from fops to dentry_ops

Signed-off-by: atndko <[email protected]>

Conflicts:
	drivers/gpu/drm/msm/sde/sde_kms.c

drivers/char/adsprpc.c

@@ -2055,16 +2055,17 @@ static int fastrpc_internal_invoke(struct fastrpc_file *fl, uint32_t mode,
 		inv_args(ctx);
 	PERF_END);
 
-	VERIFY(err, 0 == (err = ctx->retval));
-	if (err)
-		goto bail;
-
 	PERF(fl->profile, GET_COUNTER(perf_counter, PERF_PUTARGS),
 	VERIFY(err, 0 == put_args(kernel, ctx, invoke->pra));
 	PERF_END);
 	if (err)
 		goto bail;
- bail:
+
+	VERIFY(err, 0 == (err = ctx->retval));
+	if (err)
+		goto bail;
+
+bail:
 	if (ctx && interrupted == -ERESTARTSYS)
 		context_save_interrupted(ctx);
 	else if (ctx)

drivers/gpu/drm/msm/msm_atomic.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  * Copyright (C) 2014 Red Hat
  * Author: Rob Clark <[email protected]>
  *
@@ -805,6 +805,16 @@ int msm_atomic_commit(struct drm_device *dev,
 		c->plane_mask |= (1 << drm_plane_index(plane));
 	}
 
+	/* Protection for prepare_fence callback */
+retry:
+	ret = drm_modeset_lock(&state->dev->mode_config.connection_mutex,
+		state->acquire_ctx);
+
+	if (ret == -EDEADLK) {
+		drm_modeset_backoff(state->acquire_ctx);
+		goto retry;
+	}
+
 	/*
 	 * Wait for pending updates on any of the same crtc's and then
 	 * mark our set of crtc's as busy:

drivers/gpu/drm/msm/msm_drv.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  * Copyright (C) 2013 Red Hat
  * Author: Rob Clark <[email protected]>
  *
@@ -1544,6 +1544,13 @@ static int msm_release(struct inode *inode, struct file *filp)
 		kfree(node);
 	}
 
+	msm_preclose(dev, file_priv);
+
+       /**
+	* Handle preclose operation here for removing fb's whose
+	* refcount > 1. This operation is not triggered from upstream
+	* drm as msm_driver does not support DRIVER_LEGACY feature.
+	*/
 	return drm_release(inode, filp);
 }
 
@@ -1698,7 +1705,6 @@ static struct drm_driver msm_driver = {
 				DRIVER_ATOMIC |
 				DRIVER_MODESET,
 	.open               = msm_open,
-	.preclose           = msm_preclose,
 	.postclose          = msm_postclose,
 	.lastclose          = msm_lastclose,
 	.irq_handler        = msm_irq,

drivers/gpu/drm/msm/sde/sde_core_perf.c

@@ -1,4 +1,4 @@
-/* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -26,9 +26,13 @@
 #include "sde_trace.h"
 #include "sde_crtc.h"
 #include "sde_core_perf.h"
+#include "sde_connector.h"
 
 #define SDE_PERF_MODE_STRING_SIZE	128
 
+#define GET_H32(val) (val >> 32)
+#define GET_L32(val) (val & 0xffffffff)
+
 static DEFINE_MUTEX(sde_core_perf_lock);
 
 /**
@@ -84,6 +88,69 @@ static bool _sde_core_perf_crtc_is_power_on(struct drm_crtc *crtc)
 	return sde_crtc_is_enabled(crtc);
 }
 
+static void _sde_core_perf_calc_doze_suspend(struct drm_crtc *crtc,
+		struct drm_crtc_state *state,
+		struct sde_core_perf_params *perf)
+{
+	struct sde_crtc_state *new_cstate, *old_cstate;
+	struct sde_core_perf_params *old_perf;
+	struct drm_connector *conn = NULL;
+	struct sde_connector *c_conn = NULL;
+	bool is_doze_suspend = false;
+	int i;
+
+	if (!crtc || !crtc->state || !state)
+		return;
+
+	old_cstate = to_sde_crtc_state(crtc->state);
+	new_cstate = to_sde_crtc_state(state);
+	old_perf = &old_cstate->new_perf;
+
+	if (!old_perf)
+		return;
+
+	if (!perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_MNOC] &&
+		!perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_MNOC] &&
+		state->plane_mask) {
+
+		perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_MNOC] =
+			old_perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_MNOC];
+		perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_MNOC] =
+			old_perf->max_per_pipe_ib
+					[SDE_POWER_HANDLE_DBUS_ID_MNOC];
+		perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_LLCC] =
+			old_perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_LLCC];
+		perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_LLCC] =
+		  old_perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_LLCC];
+		perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_EBI] =
+			old_perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_EBI];
+		perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_EBI] =
+		  old_perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_EBI];
+
+		if (!old_perf->core_clk_rate)
+			perf->core_clk_rate = old_perf->core_clk_rate;
+
+		for (i = 0; i < new_cstate->num_connectors; i++) {
+			conn = new_cstate->connectors[i];
+			if (!conn)
+				continue;
+			c_conn = to_sde_connector(conn);
+			if ((c_conn->dpms_mode == DRM_MODE_DPMS_ON) &&
+			   (sde_connector_get_lp(conn) == SDE_MODE_DPMS_LP2))
+				is_doze_suspend = true;
+		}
+
+		if (!is_doze_suspend && conn && c_conn)
+			SDE_ERROR("No BW, planes:%x dpms_mode:%d lpmode:%d\n",
+				state->plane_mask, c_conn->dpms_mode,
+				sde_connector_get_lp(conn));
+		if (conn && c_conn)
+			SDE_EVT32(state->plane_mask, c_conn->dpms_mode,
+				sde_connector_get_lp(conn), is_doze_suspend,
+				SDE_EVTLOG_ERROR);
+	}
+}
+
 static void _sde_core_perf_calc_crtc(struct sde_kms *kms,
 		struct drm_crtc *crtc,
 		struct drm_crtc_state *state,
@@ -128,6 +195,8 @@ static void _sde_core_perf_calc_crtc(struct sde_kms *kms,
 	perf->core_clk_rate =
 			sde_crtc_get_property(sde_cstate, CRTC_PROP_CORE_CLK);
 
+	_sde_core_perf_calc_doze_suspend(crtc, state, perf);
+
 	if (!sde_cstate->bw_control) {
 		for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++) {
 			perf->bw_ctl[i] = kms->catalog->perf.max_bw_high *
@@ -143,13 +212,30 @@ static void _sde_core_perf_calc_crtc(struct sde_kms *kms,
 		perf->core_clk_rate = 0;
 	} else if (kms->perf.perf_tune.mode == SDE_PERF_MODE_FIXED) {
 		for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++) {
-			perf->bw_ctl[i] = kms->perf.fix_core_ab_vote;
-			perf->max_per_pipe_ib[i] = kms->perf.fix_core_ib_vote;
+			perf->bw_ctl[i] = max(kms->perf.fix_core_ab_vote,
+						perf->bw_ctl[i]);
+			perf->max_per_pipe_ib[i] = max(
+						kms->perf.fix_core_ib_vote,
+						perf->max_per_pipe_ib[i]);
 		}
-		perf->core_clk_rate = kms->perf.fix_core_clk_rate;
+		perf->core_clk_rate = max(kms->perf.fix_core_clk_rate,
+						perf->core_clk_rate);
 	}
 
-	SDE_EVT32(crtc->base.id, perf->core_clk_rate);
+	SDE_EVT32(DRMID(crtc), perf->core_clk_rate,
+		GET_H32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_MNOC]),
+		GET_L32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_MNOC]),
+		GET_H32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_LLCC]),
+		GET_L32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_LLCC]),
+		GET_H32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_EBI]),
+		GET_L32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_EBI]));
+	SDE_EVT32(DRMID(crtc),
+		GET_H32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_MNOC]),
+		GET_L32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_MNOC]),
+		GET_H32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_LLCC]),
+		GET_L32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_LLCC]),
+		GET_H32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_EBI]),
+		GET_L32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_EBI]));
 	trace_sde_perf_calc_crtc(crtc->base.id,
 			perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_MNOC],
 			perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_LLCC],

drivers/gpu/drm/msm/sde/sde_crtc.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
  * Copyright (C) 2013 Red Hat
  * Author: Rob Clark <[email protected]>
  *
@@ -3145,17 +3145,16 @@ static void _sde_crtc_set_input_fence_timeout(struct sde_crtc_state *cstate)
 	cstate->input_fence_timeout_ns *= NSEC_PER_MSEC;
 }
 
-/**
- * _sde_crtc_clear_dim_layers_v1 - clear all dim layer settings
- * @cstate:      Pointer to sde crtc state
- */
-static void _sde_crtc_clear_dim_layers_v1(struct sde_crtc_state *cstate)
+void _sde_crtc_clear_dim_layers_v1(struct drm_crtc_state *state)
 {
 	u32 i;
+	struct sde_crtc_state *cstate;
 
-	if (!cstate)
+	if (!state)
 		return;
 
+	cstate = to_sde_crtc_state(state);
+
 	for (i = 0; i < cstate->num_dim_layers; i++)
 		memset(&cstate->dim_layer[i], 0, sizeof(cstate->dim_layer[i]));
 
@@ -3191,7 +3190,7 @@ static void _sde_crtc_set_dim_layer_v1(struct drm_crtc *crtc,
 
 	if (!usr_ptr) {
 		/* usr_ptr is null when setting the default property value */
-		_sde_crtc_clear_dim_layers_v1(cstate);
+		_sde_crtc_clear_dim_layers_v1(&cstate->base);
 		SDE_DEBUG("dim_layer data removed\n");
 		return;
 	}
@@ -4281,6 +4280,9 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc,
 		sde_encoder_trigger_kickoff_pending(encoder);
 	}
 
+	 /* update performance setting */
+		sde_core_perf_crtc_update(crtc, 1, false);
+
 	/*
 	 * If no mixers have been allocated in sde_crtc_atomic_check(),
 	 * it means we are trying to flush a CRTC whose state is disabled:
@@ -4427,9 +4429,6 @@ static void sde_crtc_atomic_flush(struct drm_crtc *crtc,
 		cstate->rsc_update = true;
 	}
 
-	/* update performance setting before crtc kickoff */
-	sde_core_perf_crtc_update(crtc, 1, false);
-
 	/*
 	 * Final plane updates: Give each plane a chance to complete all
 	 *                      required writes/flushing before crtc's "flush

drivers/gpu/drm/msm/sde/sde_crtc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2021 The Linux Foundation. All rights reserved.
  * Copyright (C) 2013 Red Hat
  * Author: Rob Clark <[email protected]>
  *
@@ -864,4 +864,9 @@ int sde_crtc_calc_vpadding_param(struct drm_crtc_state *state,
 int sde_crtc_get_num_datapath(struct drm_crtc *crtc,
 		struct drm_connector *connector);
 
+/**
+ * _sde_crtc_clear_dim_layers_v1 - clear all dim layer settings
+ * @cstate:      Pointer to drm crtc state
+ */
+void _sde_crtc_clear_dim_layers_v1(struct drm_crtc_state *state);
 #endif /* _SDE_CRTC_H_ */