diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8/Kconfig.board b/boards/boards_legacy/xtensa/nxp_adsp_imx8/Kconfig.board deleted file mode 100644 index 4bb4f56404043f..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8/Kconfig.board +++ /dev/null @@ -1,9 +0,0 @@ -# Xtensa board configuration - -# Copyright (c) 2021 NXP -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_NXP_ADSP_IMX8 - bool "NXP ADSP i.MX8" - depends on SOC_SERIES_NXP_IMX8 - select SOC_PART_NUMBER_MIMX8QM6AVUFF diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8/Kconfig.defconfig b/boards/boards_legacy/xtensa/nxp_adsp_imx8/Kconfig.defconfig deleted file mode 100644 index 04aa0aa6ed30e5..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8/Kconfig.defconfig +++ /dev/null @@ -1,10 +0,0 @@ -# Copyright (c) 2021 NXP -# -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_NXP_ADSP_IMX8 - -config BOARD - default "nxp_adsp_imx8" - -endif # BOARD_NXP_ADSP_IMX8 diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8/board.cmake b/boards/boards_legacy/xtensa/nxp_adsp_imx8/board.cmake deleted file mode 100644 index 7ae22465082ced..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8/board.cmake +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -board_set_flasher_ifnset(misc-flasher) -board_finalize_runner_args(misc-flasher) - -board_set_rimage_target(imx8) diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/Kconfig.board b/boards/boards_legacy/xtensa/nxp_adsp_imx8m/Kconfig.board deleted file mode 100644 index b84a08cc12feb5..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/Kconfig.board +++ /dev/null @@ -1,10 +0,0 @@ -# Xtensa board configuration - -# Copyright (c) 2021 NXP -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_NXP_ADSP_IMX8M - bool "NXP i.MX8M Plus EVK Audio DSP" - depends on SOC_SERIES_NXP_IMX8M - select SOC_PART_NUMBER_MIMX8ML8DVNLZ - select SOC_PART_NUMBER_MIMX8ML8CVNKZ diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/Kconfig.defconfig b/boards/boards_legacy/xtensa/nxp_adsp_imx8m/Kconfig.defconfig deleted file mode 100644 index 344449dd74436b..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/Kconfig.defconfig +++ /dev/null @@ -1,10 +0,0 @@ -# Copyright 2021, 2023 NXP -# -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_NXP_ADSP_IMX8M - -config BOARD - default "nxp_adsp_imx8m" - -endif # BOARD_NXP_ADSP_IMX8M diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/board.cmake b/boards/boards_legacy/xtensa/nxp_adsp_imx8m/board.cmake deleted file mode 100644 index 4fb52dc2d292fb..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/board.cmake +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -board_set_flasher_ifnset(misc-flasher) -board_finalize_runner_args(misc-flasher) - -board_set_rimage_target(imx8m) diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/Kconfig.board b/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/Kconfig.board deleted file mode 100644 index d9a1ff65953286..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/Kconfig.board +++ /dev/null @@ -1,7 +0,0 @@ -# Xtensa board configuration - -# Copyright (c) 2023 NXP -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_NXP_ADSP_IMX8ULP - bool "NXP ADSP i.MX8ULP" diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/Kconfig.defconfig b/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/Kconfig.defconfig deleted file mode 100644 index 431515d5961428..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/Kconfig.defconfig +++ /dev/null @@ -1,10 +0,0 @@ -# Copyright (c) 2023 NXP -# -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_NXP_ADSP_IMX8ULP - -config BOARD - default "nxp_adsp_imx8ulp" - -endif # BOARD_NXP_ADSP_IMX8ULP diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/board.cmake b/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/board.cmake deleted file mode 100644 index e05fbc891e5202..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/board.cmake +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -board_set_flasher_ifnset(misc-flasher) -board_finalize_runner_args(misc-flasher) - -board_set_rimage_target(imx8ulp) diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/Kconfig.board b/boards/boards_legacy/xtensa/nxp_adsp_imx8x/Kconfig.board deleted file mode 100644 index 7d5336ce7a790c..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/Kconfig.board +++ /dev/null @@ -1,9 +0,0 @@ -# Xtensa board configuration - -# Copyright (c) 2021 NXP -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_NXP_ADSP_IMX8X - bool "NXP ADSP i.MX8X" - depends on SOC_SERIES_NXP_IMX8 - select SOC_PART_NUMBER_MIMX8QX6AVLFZ diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/Kconfig.defconfig b/boards/boards_legacy/xtensa/nxp_adsp_imx8x/Kconfig.defconfig deleted file mode 100644 index a985696286afb9..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/Kconfig.defconfig +++ /dev/null @@ -1,10 +0,0 @@ -# Copyright (c) 2021 NXP -# -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_NXP_ADSP_IMX8X - -config BOARD - default "nxp_adsp_imx8x" - -endif # BOARD_NXP_ADSP_IMX8X diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/board.cmake b/boards/boards_legacy/xtensa/nxp_adsp_imx8x/board.cmake deleted file mode 100644 index 7ae22465082ced..00000000000000 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/board.cmake +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -board_set_flasher_ifnset(misc-flasher) -board_finalize_runner_args(misc-flasher) - -board_set_rimage_target(imx8) diff --git a/boards/nxp/imx8mp_evk/Kconfig.imx8mp_evk b/boards/nxp/imx8mp_evk/Kconfig.imx8mp_evk index c8ea5ac45527f7..620d59828a3d65 100644 --- a/boards/nxp/imx8mp_evk/Kconfig.imx8mp_evk +++ b/boards/nxp/imx8mp_evk/Kconfig.imx8mp_evk @@ -1,6 +1,7 @@ -# Copyright 2021-2022,2024 NXP +# Copyright 2021-2022, 2024 NXP # SPDX-License-Identifier: Apache-2.0 config BOARD_IMX8MP_EVK select SOC_MIMX8ML8_A53 if BOARD_IMX8MP_EVK_MIMX8ML8_A53 || BOARD_IMX8MP_EVK_MIMX8ML8_A53_SMP - select SOC_PART_NUMBER_MIMX8ML8DVNLZ if BOARD_IMX8MP_EVK_MIMX8ML8_A53 || BOARD_IMX8MP_EVK_MIMX8ML8_A53_SMP + select SOC_MIMX8MP_ADSP if BOARD_IMX8MP_EVK_MIMX8ML8_ADSP + select SOC_PART_NUMBER_MIMX8ML8DVNLZ diff --git a/boards/nxp/imx8mp_evk/board.cmake b/boards/nxp/imx8mp_evk/board.cmake index 9881313609aae2..ca181c922bd549 100644 --- a/boards/nxp/imx8mp_evk/board.cmake +++ b/boards/nxp/imx8mp_evk/board.cmake @@ -1 +1,12 @@ +# +# Copyright (c) 2024 NXP +# # SPDX-License-Identifier: Apache-2.0 +# + +if(CONFIG_SOC_MIMX8MP_ADSP) + board_set_flasher_ifnset(misc-flasher) + board_finalize_runner_args(misc-flasher) + + board_set_rimage_target(imx8m) +endif() diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m.dts b/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp.dts similarity index 89% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m.dts rename to boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp.dts index 6a0d7508deb2a7..dc8c0ab48a5816 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m.dts +++ b/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp.dts @@ -1,5 +1,5 @@ /* - * Copyright 2021, 2023 NXP + * Copyright 2021, 2023, 2024 NXP * * SPDX-License-Identifier: Apache-2.0 */ @@ -10,7 +10,7 @@ #include / { - model = "nxp_adsp_imx8m"; + model = "NXP i.MX 8MPLUS Audio DSP"; compatible = "nxp"; chosen { diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m.yaml b/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp.yaml similarity index 70% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m.yaml rename to boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp.yaml index ef0bbdfe0ff04f..78668aa26f61e1 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m.yaml +++ b/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp.yaml @@ -1,5 +1,5 @@ -identifier: nxp_adsp_imx8m -name: NXP i.MX8M Plus EVK Audio DSP +identifier: imx8mp_evk/mimx8ml8/adsp +name: NXP i.MX 8MPLUS Audio DSP type: mcu arch: xtensa toolchain: diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m_defconfig b/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp_defconfig similarity index 85% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m_defconfig rename to boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp_defconfig index 72ccd09f55a47c..e2c64fa2e0dc07 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8m/nxp_adsp_imx8m_defconfig +++ b/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp_defconfig @@ -1,9 +1,5 @@ # SPDX-License-Identifier: Apache-2.0 -CONFIG_SOC_SERIES_NXP_IMX8M=y -CONFIG_SOC_MIMX8M_ADSP=y -CONFIG_BOARD_NXP_ADSP_IMX8M=y - # size of stack for initialization and main thread CONFIG_MAIN_STACK_SIZE=3072 diff --git a/boards/nxp/imx8qm_mek/Kconfig.imx8qm_mek b/boards/nxp/imx8qm_mek/Kconfig.imx8qm_mek new file mode 100644 index 00000000000000..f70580b800c0d2 --- /dev/null +++ b/boards/nxp/imx8qm_mek/Kconfig.imx8qm_mek @@ -0,0 +1,8 @@ +# +# Copyright 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_IMX8QM_MEK + select SOC_MIMX8QM_ADSP if BOARD_IMX8QM_MEK_MIMX8QM6_ADSP + select SOC_PART_NUMBER_MIMX8QM6AVUFF diff --git a/boards/nxp/imx8qm_mek/board.cmake b/boards/nxp/imx8qm_mek/board.cmake new file mode 100644 index 00000000000000..0924bf99eecf75 --- /dev/null +++ b/boards/nxp/imx8qm_mek/board.cmake @@ -0,0 +1,12 @@ +# +# Copyright (c) 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +if(CONFIG_SOC_MIMX8QM_ADSP) + board_set_flasher_ifnset(misc-flasher) + board_finalize_runner_args(misc-flasher) + + board_set_rimage_target(imx) +endif() diff --git a/boards/nxp/imx8qm_mek/board.yml b/boards/nxp/imx8qm_mek/board.yml new file mode 100644 index 00000000000000..d044277a6220bf --- /dev/null +++ b/boards/nxp/imx8qm_mek/board.yml @@ -0,0 +1,5 @@ +board: + name: imx8qm_mek + vendor: nxp + socs: + - name: mimx8qm6 diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8/nxp_adsp_imx8-pinctrl.dtsi b/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp-pinctrl.dtsi similarity index 100% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8/nxp_adsp_imx8-pinctrl.dtsi rename to boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp-pinctrl.dtsi diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x.dts b/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.dts similarity index 74% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x.dts rename to boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.dts index 5aa0e59ebdd078..325e293851f156 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x.dts +++ b/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.dts @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 NXP + * Copyright (c) 2021, 2024 NXP * * SPDX-License-Identifier: Apache-2.0 */ @@ -7,10 +7,10 @@ /dts-v1/; #include -#include "nxp_adsp_imx8x-pinctrl.dtsi" +#include "imx8qm_mek_mimx8qm6_adsp-pinctrl.dtsi" / { - model = "nxp_adsp_imx8x"; + model = "NXP i.MX 8QM Audio DSP"; compatible = "nxp"; chosen { diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8/nxp_adsp_imx8.yaml b/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.yaml similarity index 60% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8/nxp_adsp_imx8.yaml rename to boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.yaml index b2ab9b227a9dc9..c2a70b2652d974 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8/nxp_adsp_imx8.yaml +++ b/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.yaml @@ -1,5 +1,5 @@ -identifier: nxp_adsp_imx8 -name: i.MX8 DSP +identifier: imx8qm_mek/mimx8qm6/adsp +name: NXP i.MX 8QM Audio DSP type: mcu arch: xtensa toolchain: diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8/nxp_adsp_imx8_defconfig b/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_defconfig similarity index 80% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8/nxp_adsp_imx8_defconfig rename to boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_defconfig index a16d8be5e2e36e..325b05b84e90c5 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8/nxp_adsp_imx8_defconfig +++ b/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_defconfig @@ -3,10 +3,6 @@ CONFIG_MAIN_STACK_SIZE=3072 # board/soc-related configurations -CONFIG_SOC_SERIES_NXP_IMX8=y -CONFIG_SOC_MIMX8QM_ADSP=y -CONFIG_BOARD_NXP_ADSP_IMX8=y - CONFIG_LOG=y # TODO: maybe move this to SOF? diff --git a/boards/nxp/imx8qxp_mek/Kconfig.imx8qxp_mek b/boards/nxp/imx8qxp_mek/Kconfig.imx8qxp_mek new file mode 100644 index 00000000000000..fbd35d46b2f935 --- /dev/null +++ b/boards/nxp/imx8qxp_mek/Kconfig.imx8qxp_mek @@ -0,0 +1,8 @@ +# +# Copyright 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_IMX8QXP_MEK + select SOC_MIMX8QXP_ADSP if BOARD_IMX8QXP_MEK_MIMX8QX6_ADSP + select SOC_PART_NUMBER_MIMX8QX6AVLFZ diff --git a/boards/nxp/imx8qxp_mek/board.cmake b/boards/nxp/imx8qxp_mek/board.cmake new file mode 100644 index 00000000000000..699964c5e39aec --- /dev/null +++ b/boards/nxp/imx8qxp_mek/board.cmake @@ -0,0 +1,12 @@ +# +# Copyright (c) 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +if(CONFIG_SOC_MIMX8QXP_ADSP) + board_set_flasher_ifnset(misc-flasher) + board_finalize_runner_args(misc-flasher) + + board_set_rimage_target(imx) +endif() diff --git a/boards/nxp/imx8qxp_mek/board.yml b/boards/nxp/imx8qxp_mek/board.yml new file mode 100644 index 00000000000000..e31754086d7362 --- /dev/null +++ b/boards/nxp/imx8qxp_mek/board.yml @@ -0,0 +1,5 @@ +board: + name: imx8qxp_mek + vendor: nxp + socs: + - name: mimx8qx6 diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x-pinctrl.dtsi b/boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp-pinctrl.dtsi similarity index 100% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x-pinctrl.dtsi rename to boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp-pinctrl.dtsi diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8/nxp_adsp_imx8.dts b/boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp.dts similarity index 74% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8/nxp_adsp_imx8.dts rename to boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp.dts index a17690109eca59..24a9ee09d9e5ae 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8/nxp_adsp_imx8.dts +++ b/boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp.dts @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 NXP + * Copyright (c) 2021, 2024 NXP * * SPDX-License-Identifier: Apache-2.0 */ @@ -7,10 +7,10 @@ /dts-v1/; #include -#include "nxp_adsp_imx8-pinctrl.dtsi" +#include "imx8qxp_mek_mimx8qx6_adsp-pinctrl.dtsi" / { - model = "nxp_adsp_imx8"; + model = "NXP i.MX 8QXP Audio DSP"; compatible = "nxp"; chosen { diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x.yaml b/boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp.yaml similarity index 60% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x.yaml rename to boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp.yaml index a343b8843c8dcc..4f168ada93e566 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x.yaml +++ b/boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp.yaml @@ -1,5 +1,5 @@ -identifier: nxp_adsp_imx8x -name: i.MX8X DSP +identifier: imx8qxp_mek/mimx8qx6/adsp +name: NXP i.MX 8QXP Audio DSP type: mcu arch: xtensa toolchain: diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x_defconfig b/boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp_defconfig similarity index 79% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x_defconfig rename to boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp_defconfig index 0635e78adf88f6..325b05b84e90c5 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x_defconfig +++ b/boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp_defconfig @@ -3,10 +3,6 @@ CONFIG_MAIN_STACK_SIZE=3072 # board/soc-related configurations -CONFIG_SOC_SERIES_NXP_IMX8=y -CONFIG_SOC_MIMX8QXP_ADSP=y -CONFIG_BOARD_NXP_ADSP_IMX8X=y - CONFIG_LOG=y # TODO: maybe move this to SOF? diff --git a/boards/nxp/imx8ulp_evk/Kconfig.imx8ulp_evk b/boards/nxp/imx8ulp_evk/Kconfig.imx8ulp_evk new file mode 100644 index 00000000000000..dbf611081ab7cf --- /dev/null +++ b/boards/nxp/imx8ulp_evk/Kconfig.imx8ulp_evk @@ -0,0 +1,7 @@ +# +# Copyright 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_IMX8ULP_EVK + select SOC_MIMX8ULP_ADSP if BOARD_IMX8ULP_EVK_IMX8ULP_ADSP diff --git a/boards/nxp/imx8ulp_evk/board.cmake b/boards/nxp/imx8ulp_evk/board.cmake new file mode 100644 index 00000000000000..97e0a80ba04ca5 --- /dev/null +++ b/boards/nxp/imx8ulp_evk/board.cmake @@ -0,0 +1,12 @@ +# +# Copyright (c) 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +if(CONFIG_SOC_MIMX8ULP_ADSP) + board_set_flasher_ifnset(misc-flasher) + board_finalize_runner_args(misc-flasher) + + board_set_rimage_target(imx8ulp) +endif() diff --git a/boards/nxp/imx8ulp_evk/board.yml b/boards/nxp/imx8ulp_evk/board.yml new file mode 100644 index 00000000000000..b401615d7d7856 --- /dev/null +++ b/boards/nxp/imx8ulp_evk/board.yml @@ -0,0 +1,5 @@ +board: + name: imx8ulp_evk + vendor: nxp + socs: + - name: imx8ulp diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/nxp_adsp_imx8ulp.dts b/boards/nxp/imx8ulp_evk/imx8ulp_evk_imx8ulp_adsp.dts similarity index 70% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/nxp_adsp_imx8ulp.dts rename to boards/nxp/imx8ulp_evk/imx8ulp_evk_imx8ulp_adsp.dts index d584097cb0306e..49ad098fb24477 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/nxp_adsp_imx8ulp.dts +++ b/boards/nxp/imx8ulp_evk/imx8ulp_evk_imx8ulp_adsp.dts @@ -1,5 +1,5 @@ /* - * Copyright (c) 2023 NXP + * Copyright (c) 2023-2024 NXP * * SPDX-License-Identifier: Apache-2.0 */ @@ -9,7 +9,7 @@ #include / { - model = "nxp_adsp_imx8ulp"; + model = "NXP i.MX 8ULP Audio DSP"; compatible = "nxp"; chosen { diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/nxp_adsp_imx8ulp.yaml b/boards/nxp/imx8ulp_evk/imx8ulp_evk_imx8ulp_adsp.yaml similarity index 57% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/nxp_adsp_imx8ulp.yaml rename to boards/nxp/imx8ulp_evk/imx8ulp_evk_imx8ulp_adsp.yaml index e71105631da6f9..437d112ee58825 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/nxp_adsp_imx8ulp.yaml +++ b/boards/nxp/imx8ulp_evk/imx8ulp_evk_imx8ulp_adsp.yaml @@ -1,5 +1,5 @@ -identifier: nxp_adsp_imx8ulp -name: i.MX8ULP DSP +identifier: imx8ulp_evk/imx8ulp/adsp +name: NXP i.MX 8ULP Audio DSP type: mcu arch: xtensa toolchain: diff --git a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/nxp_adsp_imx8ulp_defconfig b/boards/nxp/imx8ulp_evk/imx8ulp_evk_imx8ulp_adsp_defconfig similarity index 54% rename from boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/nxp_adsp_imx8ulp_defconfig rename to boards/nxp/imx8ulp_evk/imx8ulp_evk_imx8ulp_adsp_defconfig index cc1911c615cfce..e8d594b3070dac 100644 --- a/boards/boards_legacy/xtensa/nxp_adsp_imx8ulp/nxp_adsp_imx8ulp_defconfig +++ b/boards/nxp/imx8ulp_evk/imx8ulp_evk_imx8ulp_adsp_defconfig @@ -1,9 +1,5 @@ # SPDX-License-Identifier: Apache-2.0 -CONFIG_SOC_SERIES_NXP_IMX8ULP=y -CONFIG_SOC_NXP_IMX8ULP=y -CONFIG_BOARD_NXP_ADSP_IMX8ULP=y - CONFIG_BUILD_OUTPUT_BIN=n CONFIG_DYNAMIC_INTERRUPTS=y diff --git a/modules/Kconfig.imx b/modules/Kconfig.imx index 5b387f1e9a54c3..231c658f821d58 100644 --- a/modules/Kconfig.imx +++ b/modules/Kconfig.imx @@ -6,7 +6,7 @@ config HAS_IMX_HAL bool select HAS_CMSIS_CORE - depends on SOC_FAMILY_IMX + depends on SOC_FAMILY_NXP_IMX || SOC_FAMILY_IMX if HAS_IMX_HAL diff --git a/modules/Kconfig.mcux b/modules/Kconfig.mcux index 1b6c6f6feb5422..5d842716e415c8 100644 --- a/modules/Kconfig.mcux +++ b/modules/Kconfig.mcux @@ -5,9 +5,8 @@ config HAS_MCUX bool - depends on SOC_FAMILY_KINETIS || SOC_FAMILY_IMX || SOC_FAMILY_LPC || \ - SOC_FAMILY_NXP_ADSP || SOC_FAMILY_NXP_S32 || SOC_FAMILY_NXP_IMXRT - + depends on SOC_FAMILY_KINETIS || SOC_FAMILY_NXP_IMX || SOC_FAMILY_LPC || \ + SOC_FAMILY_NXP_S32 || SOC_FAMILY_IMX || SOC_FAMILY_NXP_IMXRT if HAS_MCUX config MCUX_CORE_SUFFIX diff --git a/samples/subsys/ipc/openamp_rsc_table/boards/nxp_adsp_imx8m.conf b/samples/subsys/ipc/openamp_rsc_table/boards/imx8mp_evk_mimx8ml8_adsp.conf similarity index 100% rename from samples/subsys/ipc/openamp_rsc_table/boards/nxp_adsp_imx8m.conf rename to samples/subsys/ipc/openamp_rsc_table/boards/imx8mp_evk_mimx8ml8_adsp.conf diff --git a/samples/subsys/ipc/openamp_rsc_table/boards/nxp_adsp_imx8m.overlay b/samples/subsys/ipc/openamp_rsc_table/boards/imx8mp_evk_mimx8ml8_adsp.overlay similarity index 100% rename from samples/subsys/ipc/openamp_rsc_table/boards/nxp_adsp_imx8m.overlay rename to samples/subsys/ipc/openamp_rsc_table/boards/imx8mp_evk_mimx8ml8_adsp.overlay diff --git a/samples/subsys/ipc/openamp_rsc_table/sample.yaml b/samples/subsys/ipc/openamp_rsc_table/sample.yaml index 3c9d58d320216a..d1c94c10585d82 100644 --- a/samples/subsys/ipc/openamp_rsc_table/sample.yaml +++ b/samples/subsys/ipc/openamp_rsc_table/sample.yaml @@ -7,8 +7,8 @@ tests: build_only: true platform_allow: - stm32mp157c_dk2 - - nxp_adsp_imx8m + - imx8mp_evk/mimx8ml8/adsp integration_platforms: - stm32mp157c_dk2 - - nxp_adsp_imx8m + - imx8mp_evk/mimx8ml8/adsp tags: ipm diff --git a/soc/nxp/imx/CMakeLists.txt b/soc/nxp/imx/CMakeLists.txt index fed279096ccbcd..f14f2e1e116add 100644 --- a/soc/nxp/imx/CMakeLists.txt +++ b/soc/nxp/imx/CMakeLists.txt @@ -1,7 +1,9 @@ -# -# Copyright (c) 2022, NXP -# +# Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 -# add_subdirectory(${SOC_SERIES}) + +zephyr_include_directories(.) +zephyr_include_directories(${SOC_SERIES}) + +zephyr_include_directories(${SOC_SERIES}/include) diff --git a/soc/nxp/imx/Kconfig b/soc/nxp/imx/Kconfig index a869a87cb5965f..9fba09a031ea05 100644 --- a/soc/nxp/imx/Kconfig +++ b/soc/nxp/imx/Kconfig @@ -1,11 +1,13 @@ -# Copyright (c) 2017-2020,2024 NXP +# Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 -config SOC_FAMILY_IMX +config SOC_FAMILY_NXP_IMX select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE -if SOC_FAMILY_IMX +if SOC_FAMILY_NXP_IMX +# Source series Kconfig files first, so SOCs +# can override the defaults given here rsource "*/Kconfig" -endif # SOC_FAMILY_IMX +endif # SOC_FAMILY_NXP_IMX diff --git a/soc/nxp/imx/Kconfig.defconfig b/soc/nxp/imx/Kconfig.defconfig index 9e366c06d9af3b..a606387831706e 100644 --- a/soc/nxp/imx/Kconfig.defconfig +++ b/soc/nxp/imx/Kconfig.defconfig @@ -1,8 +1,10 @@ -# Copyright 2017,2024 NXP +# Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 -if SOC_FAMILY_IMX +if SOC_FAMILY_NXP_IMX +# Source series Kconfig files first, so SoCs +# can override the defaults given here rsource "*/Kconfig.defconfig" -endif # SOC_FAMILY_IMX +endif # SOC_FAMILY_NXP_IMX diff --git a/soc/nxp/imx/Kconfig.soc b/soc/nxp/imx/Kconfig.soc index f3fd611915e6fa..d0418fce746bea 100644 --- a/soc/nxp/imx/Kconfig.soc +++ b/soc/nxp/imx/Kconfig.soc @@ -1,10 +1,10 @@ -# Copyright 2017,2024 NXP +# Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 -config SOC_FAMILY_IMX +config SOC_FAMILY_NXP_IMX bool config SOC_FAMILY - default "imx" if SOC_FAMILY_IMX + default "nxp_imx" if SOC_FAMILY_NXP_IMX rsource "*/Kconfig.soc" diff --git a/soc/nxp/imx/imx8/CMakeLists.txt b/soc/nxp/imx/imx8/CMakeLists.txt new file mode 100644 index 00000000000000..209de9c95ad13c --- /dev/null +++ b/soc/nxp/imx/imx8/CMakeLists.txt @@ -0,0 +1,27 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if(CONFIG_SOC_MIMX8QM_ADSP) + zephyr_include_directories(adsp) + add_subdirectory(adsp) + + zephyr_sources( + adsp/pinctrl_soc.h + ) + + # west sign + + # See detailed comments in soc/intel/intel_adsp/common/CMakeLists.txt + add_custom_target(zephyr.ri ALL + DEPENDS ${CMAKE_BINARY_DIR}/zephyr/zephyr.ri + ) + + add_custom_command( + OUTPUT ${CMAKE_BINARY_DIR}/zephyr/zephyr.ri + COMMENT "west sign --if-tool-available --tool rimage ..." + COMMAND west sign --if-tool-available --tool rimage --build-dir ${CMAKE_BINARY_DIR} ${WEST_SIGN_OPTS} + DEPENDS ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_ELF_NAME} + ) + + set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/adsp/linker.ld CACHE INTERNAL "") +endif() diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8m/Kconfig.series b/soc/nxp/imx/imx8/Kconfig similarity index 65% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8m/Kconfig.series rename to soc/nxp/imx/imx8/Kconfig index 3847f52d2dad1b..e7993616bbd510 100644 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8m/Kconfig.series +++ b/soc/nxp/imx/imx8/Kconfig @@ -1,9 +1,7 @@ -# Copyright (c) 2021 NXP +# Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 -config SOC_SERIES_NXP_IMX8M - bool "NXP i.MX8M Audio DSP Series" - select SOC_FAMILY_NXP_ADSP +config SOC_MIMX8QM_ADSP select XTENSA select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang") select XTENSA_RESET_VECTOR @@ -11,5 +9,7 @@ config SOC_SERIES_NXP_IMX8M select ATOMIC_OPERATIONS_BUILTIN select GEN_ISR_TABLES select XTENSA_SMALL_VECTOR_TABLE_ENTRY - help - Enable support for NXP i.MX8M Audio DSP + select HAS_MCUX + +config MCUX_CORE_SUFFIX + default "_dsp" if SOC_MIMX8QM_ADSP diff --git a/soc/nxp/imx/imx8/Kconfig.defconfig b/soc/nxp/imx/imx8/Kconfig.defconfig new file mode 100644 index 00000000000000..203c43b1214873 --- /dev/null +++ b/soc/nxp/imx/imx8/Kconfig.defconfig @@ -0,0 +1,45 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_IMX8 + +if SOC_MIMX8QM_ADSP + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 666000000 + +config SYS_CLOCK_TICKS_PER_SEC + default 50000 + +config DCACHE_LINE_SIZE + default 128 + +config GEN_IRQ_VECTOR_TABLE + default n + +config CACHE_MANAGEMENT + default y + +config SMP + default n + +config XTENSA_TIMER + default y + +config KERNEL_ENTRY + default "__start" + +config MULTI_LEVEL_INTERRUPTS + default n + +config 2ND_LEVEL_INTERRUPTS + default n + +# To prevent test uses TEST_LOGGING_MINIMAL +config TEST_LOGGING_DEFAULTS + default n + depends on TEST + +endif # SOC_MIMX8QM_ADSP + +endif # SOC_SERIES_IMX8 diff --git a/soc/nxp/imx/imx8/Kconfig.soc b/soc/nxp/imx/imx8/Kconfig.soc new file mode 100644 index 00000000000000..46903a8437d313 --- /dev/null +++ b/soc/nxp/imx/imx8/Kconfig.soc @@ -0,0 +1,32 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_IMX8 + bool + select SOC_FAMILY_NXP_IMX + +config SOC_SERIES + default "imx8" if SOC_SERIES_IMX8 + +config SOC_MIMX8QM + bool + select SOC_SERIES_IMX8 + +config SOC + default "mimx8qm6" if SOC_MIMX8QM + +config SOC_MIMX8QM_ADSP + bool + select SOC_MIMX8QM + help + Enable support for NXP i.MX 8QM Audio DSP + +config SOC_TOOLCHAIN_NAME + string + default "nxp_imx_adsp" if SOC_MIMX8QM_ADSP + +config SOC_PART_NUMBER_MIMX8QM6AVUFF + bool + +config SOC_PART_NUMBER + default "MIMX8QM6AVUFF" if SOC_PART_NUMBER_MIMX8QM6AVUFF diff --git a/soc/nxp/imx/imx8/adsp/CMakeLists.txt b/soc/nxp/imx/imx8/adsp/CMakeLists.txt new file mode 100644 index 00000000000000..a91c59914123ab --- /dev/null +++ b/soc/nxp/imx/imx8/adsp/CMakeLists.txt @@ -0,0 +1,6 @@ +# NXP SoC family CMake file +# +# Copyright (c) 2021, 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(include) diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8/include/_soc_inthandlers.h b/soc/nxp/imx/imx8/adsp/_soc_inthandlers.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8/include/_soc_inthandlers.h rename to soc/nxp/imx/imx8/adsp/_soc_inthandlers.h diff --git a/soc/nxp/imx/imx8/adsp/include/adsp/cache.h b/soc/nxp/imx/imx8/adsp/include/adsp/cache.h new file mode 100644 index 00000000000000..067c08901403cf --- /dev/null +++ b/soc/nxp/imx/imx8/adsp/include/adsp/cache.h @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __COMMON_ADSP_CACHE_H__ +#define __COMMON_ADSP_CACHE_H__ + +#include + +#endif diff --git a/soc/nxp/imx/imx8/adsp/include/adsp/io.h b/soc/nxp/imx/imx8/adsp/include/adsp/io.h new file mode 100644 index 00000000000000..3d1f0ed98d5a74 --- /dev/null +++ b/soc/nxp/imx/imx8/adsp/include/adsp/io.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __INCLUDE_IO__ +#define __INCLUDE_IO__ + +#include +#include +#include +#include + +static inline uint32_t io_reg_read(uint32_t reg) +{ + return sys_read32(reg); +} + +static inline void io_reg_write(uint32_t reg, uint32_t val) +{ + sys_write32(val, reg); +} + +static inline void io_reg_update_bits(uint32_t reg, uint32_t mask, + uint32_t value) +{ + io_reg_write(reg, (io_reg_read(reg) & (~mask)) | (value & mask)); +} + +static inline uint16_t io_reg_read16(uint32_t reg) +{ + return sys_read16(reg); +} + +static inline void io_reg_write16(uint32_t reg, uint16_t val) +{ + sys_write16(val, reg); +} + +#endif diff --git a/soc/nxp/imx/imx8/adsp/include/soc.h b/soc/nxp/imx/imx8/adsp/include/soc.h new file mode 100644 index 00000000000000..89ee9d96a5207b --- /dev/null +++ b/soc/nxp/imx/imx8/adsp/include/soc.h @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include + +#include + +#ifndef __INC_IMX_SOC_H +#define __INC_IMX_SOC_H + +/* Macros related to interrupt handling */ +#define XTENSA_IRQ_NUM_SHIFT 0 +#define XTENSA_IRQ_NUM_MASK 0xff + +/* + * IRQs are mapped on levels. 2nd, 3rd and 4th level are left as 0x00. + * + * 1. Peripheral Register bit offset. + */ +#define XTENSA_IRQ_NUMBER(_irq) \ + ((_irq >> XTENSA_IRQ_NUM_SHIFT) & XTENSA_IRQ_NUM_MASK) + +extern void z_soc_irq_enable(uint32_t irq); +extern void z_soc_irq_disable(uint32_t irq); +extern int z_soc_irq_is_enabled(unsigned int irq); + +#endif /* __INC_IMX_SOC_H */ diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8/linker.ld b/soc/nxp/imx/imx8/adsp/linker.ld similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8/linker.ld rename to soc/nxp/imx/imx8/adsp/linker.ld diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8/include/memory.h b/soc/nxp/imx/imx8/adsp/memory.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8/include/memory.h rename to soc/nxp/imx/imx8/adsp/memory.h diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8/pinctrl_soc.h b/soc/nxp/imx/imx8/adsp/pinctrl_soc.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8/pinctrl_soc.h rename to soc/nxp/imx/imx8/adsp/pinctrl_soc.h diff --git a/soc/nxp/imx/imx8m/CMakeLists.txt b/soc/nxp/imx/imx8m/CMakeLists.txt index be21460608b153..3279ca89529a45 100644 --- a/soc/nxp/imx/imx8m/CMakeLists.txt +++ b/soc/nxp/imx/imx8m/CMakeLists.txt @@ -1,9 +1,39 @@ +# Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 +if(CONFIG_SOC_MIMX8MP_ADSP) + zephyr_include_directories(adsp) + add_subdirectory(adsp) + + zephyr_sources( + adsp/pinctrl_soc.h + ) + + # west sign + + # See detailed comments in soc/intel/intel_adsp/common/CMakeLists.txt + add_custom_target(zephyr.ri ALL + DEPENDS ${CMAKE_BINARY_DIR}/zephyr/zephyr.ri + ) + + add_custom_command( + OUTPUT ${CMAKE_BINARY_DIR}/zephyr/zephyr.ri + COMMENT "west sign --if-tool-available --tool rimage ..." + COMMAND west sign --if-tool-available --tool rimage --build-dir ${CMAKE_BINARY_DIR} ${WEST_SIGN_OPTS} + DEPENDS ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_ELF_NAME} + ) + + set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/adsp/linker.ld CACHE INTERNAL "") +endif() + if(CONFIG_SOC_MIMX8ML8_A53 OR CONFIG_SOC_MIMX8MM6_A53 OR CONFIG_SOC_MIMX8MN6_A53) zephyr_include_directories(.) zephyr_include_directories(a53) + zephyr_sources( + a53/pinctrl_soc.h + ) + zephyr_sources_ifdef(CONFIG_ARM_MMU a53/mmu_regions.c) set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm64/scripts/linker.ld CACHE INTERNAL "") diff --git a/soc/nxp/imx/imx8m/Kconfig b/soc/nxp/imx/imx8m/Kconfig index 74b5696d327d1b..c9e26d52ec1bdc 100644 --- a/soc/nxp/imx/imx8m/Kconfig +++ b/soc/nxp/imx/imx8m/Kconfig @@ -25,5 +25,19 @@ config SOC_MIMX8MN6_A53 select HAS_MCUX_CCM if CLOCK_CONTROL select HAS_MCUX_IOMUXC if PINCTRL +config SOC_MIMX8MP_ADSP + select XTENSA + select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang") + select XTENSA_RESET_VECTOR + select XTENSA_USE_CORE_CRT1 + select ATOMIC_OPERATIONS_BUILTIN + select GEN_ISR_TABLES + select XTENSA_SMALL_VECTOR_TABLE_ENTRY + select HAS_MCUX if CLOCK_CONTROL + select HAS_MCUX_CCM if CLOCK_CONTROL + select HAS_MCUX_IOMUXC if PINCTRL + select PINCTRL_IMX if HAS_MCUX_IOMUXC + config MCUX_CORE_SUFFIX default "_ca53" if SOC_MIMX8MM6_A53 || SOC_MIMX8MN6_A53 || SOC_MIMX8ML8_A53 + default "_dsp" if SOC_MIMX8MP_ADSP diff --git a/soc/nxp/imx/imx8m/Kconfig.defconfig b/soc/nxp/imx/imx8m/Kconfig.defconfig index 38eb51b3ff232b..d2e4264634398b 100644 --- a/soc/nxp/imx/imx8m/Kconfig.defconfig +++ b/soc/nxp/imx/imx8m/Kconfig.defconfig @@ -1,8 +1,8 @@ -# Copyright 2020-2022,2024 NXP +# Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 if SOC_SERIES_IMX8M rsource "Kconfig.defconfig.*" -endif # SOC_SERIES_MIMX8M +endif # SOC_SERIES_IMX8M diff --git a/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8_adsp b/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8_adsp new file mode 100644 index 00000000000000..6c29a2975f7f78 --- /dev/null +++ b/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8_adsp @@ -0,0 +1,48 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_IMX8M + +if SOC_MIMX8MP_ADSP + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 800000000 + +config SYS_CLOCK_TICKS_PER_SEC + default 50000 + +config DCACHE_LINE_SIZE + default 128 + +config GEN_IRQ_VECTOR_TABLE + default n + +config CACHE_MANAGEMENT + default y + +config SMP + default n + +config XTENSA_TIMER + default y + +config KERNEL_ENTRY + default "__start" + +config MULTI_LEVEL_INTERRUPTS + default n + +config 2ND_LEVEL_INTERRUPTS + default n + +config DYNAMIC_INTERRUPTS + default y + +# To prevent test uses TEST_LOGGING_MINIMAL +config TEST_LOGGING_DEFAULTS + default n + depends on TEST + +endif # SOC_MIMX8MP_ADSP + +endif # SOC_SERIES_IMX8M diff --git a/soc/nxp/imx/imx8m/Kconfig.soc b/soc/nxp/imx/imx8m/Kconfig.soc index 3141ecbb763399..9717acd6ee6fd6 100644 --- a/soc/nxp/imx/imx8m/Kconfig.soc +++ b/soc/nxp/imx/imx8m/Kconfig.soc @@ -1,9 +1,16 @@ -# Copyright 2020-2022,2024 NXP +# Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 config SOC_SERIES_IMX8M bool - select SOC_FAMILY_IMX + select SOC_FAMILY_NXP_IMX + +config SOC_SERIES + default "imx8m" if SOC_SERIES_IMX8M + +config SOC_MIMX8MP + bool + select SOC_SERIES_IMX8M config SOC_MIMX8MM6 bool @@ -15,16 +22,26 @@ config SOC_MIMX8MM6_A53 help NXP i.MX8MM A53 -config SOC_MIMX8ML8 +config SOC_MIMX8MP bool select SOC_SERIES_IMX8M config SOC_MIMX8ML8_A53 bool - select SOC_MIMX8ML8 + select SOC_MIMX8MP help NXP i.MX8MP A53 +config SOC_MIMX8MP_ADSP + bool + select SOC_MIMX8MP + help + Enable support for NXP i.MX 8MPLUS Audio DSP + +config SOC_TOOLCHAIN_NAME + string + default "nxp_imx8m_adsp" if SOC_MIMX8MP_ADSP + config SOC_MIMX8MN6 bool select SOC_SERIES_IMX8M @@ -35,6 +52,11 @@ config SOC_MIMX8MN6_A53 help NXP i.MX8MN A53 +config SOC + default "mimx8mm6" if SOC_MIMX8MM6 + default "mimx8mn6" if SOC_MIMX8MN6 + default "mimx8ml8" if SOC_MIMX8MP + config SOC_PART_NUMBER_MIMX8ML8DVNLZ bool @@ -64,11 +86,3 @@ config SOC_PART_NUMBER default "MIMX8MN6DUCJZ" if SOC_PART_NUMBER_MIMX8MN6DUCJZ default "MIMX8MN6CVTIZ" if SOC_PART_NUMBER_MIMX8MN6CVTIZ default "MIMX8MN6CUCIZ" if SOC_PART_NUMBER_MIMX8MN6CUCIZ - -config SOC - default "mimx8mm6" if SOC_MIMX8MM6 - default "mimx8mn6" if SOC_MIMX8MN6 - default "mimx8ml8" if SOC_MIMX8ML8 - -config SOC_SERIES - default "imx8m" if SOC_SERIES_IMX8M diff --git a/soc/nxp/imx/imx8m/pinctrl_soc.h b/soc/nxp/imx/imx8m/a53/pinctrl_soc.h similarity index 100% rename from soc/nxp/imx/imx8m/pinctrl_soc.h rename to soc/nxp/imx/imx8m/a53/pinctrl_soc.h diff --git a/soc/nxp/imx/imx8m/adsp/CMakeLists.txt b/soc/nxp/imx/imx8m/adsp/CMakeLists.txt new file mode 100644 index 00000000000000..a91c59914123ab --- /dev/null +++ b/soc/nxp/imx/imx8m/adsp/CMakeLists.txt @@ -0,0 +1,6 @@ +# NXP SoC family CMake file +# +# Copyright (c) 2021, 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(include) diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8m/include/_soc_inthandlers.h b/soc/nxp/imx/imx8m/adsp/_soc_inthandlers.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8m/include/_soc_inthandlers.h rename to soc/nxp/imx/imx8m/adsp/_soc_inthandlers.h diff --git a/soc/nxp/imx/imx8m/adsp/include/adsp/cache.h b/soc/nxp/imx/imx8m/adsp/include/adsp/cache.h new file mode 100644 index 00000000000000..067c08901403cf --- /dev/null +++ b/soc/nxp/imx/imx8m/adsp/include/adsp/cache.h @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __COMMON_ADSP_CACHE_H__ +#define __COMMON_ADSP_CACHE_H__ + +#include + +#endif diff --git a/soc/nxp/imx/imx8m/adsp/include/adsp/io.h b/soc/nxp/imx/imx8m/adsp/include/adsp/io.h new file mode 100644 index 00000000000000..3d1f0ed98d5a74 --- /dev/null +++ b/soc/nxp/imx/imx8m/adsp/include/adsp/io.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __INCLUDE_IO__ +#define __INCLUDE_IO__ + +#include +#include +#include +#include + +static inline uint32_t io_reg_read(uint32_t reg) +{ + return sys_read32(reg); +} + +static inline void io_reg_write(uint32_t reg, uint32_t val) +{ + sys_write32(val, reg); +} + +static inline void io_reg_update_bits(uint32_t reg, uint32_t mask, + uint32_t value) +{ + io_reg_write(reg, (io_reg_read(reg) & (~mask)) | (value & mask)); +} + +static inline uint16_t io_reg_read16(uint32_t reg) +{ + return sys_read16(reg); +} + +static inline void io_reg_write16(uint32_t reg, uint16_t val) +{ + sys_write16(val, reg); +} + +#endif diff --git a/soc/nxp/imx/imx8m/adsp/include/soc.h b/soc/nxp/imx/imx8m/adsp/include/soc.h new file mode 100644 index 00000000000000..89ee9d96a5207b --- /dev/null +++ b/soc/nxp/imx/imx8m/adsp/include/soc.h @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include + +#include + +#ifndef __INC_IMX_SOC_H +#define __INC_IMX_SOC_H + +/* Macros related to interrupt handling */ +#define XTENSA_IRQ_NUM_SHIFT 0 +#define XTENSA_IRQ_NUM_MASK 0xff + +/* + * IRQs are mapped on levels. 2nd, 3rd and 4th level are left as 0x00. + * + * 1. Peripheral Register bit offset. + */ +#define XTENSA_IRQ_NUMBER(_irq) \ + ((_irq >> XTENSA_IRQ_NUM_SHIFT) & XTENSA_IRQ_NUM_MASK) + +extern void z_soc_irq_enable(uint32_t irq); +extern void z_soc_irq_disable(uint32_t irq); +extern int z_soc_irq_is_enabled(unsigned int irq); + +#endif /* __INC_IMX_SOC_H */ diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8m/linker.ld b/soc/nxp/imx/imx8m/adsp/linker.ld similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8m/linker.ld rename to soc/nxp/imx/imx8m/adsp/linker.ld diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8m/include/memory.h b/soc/nxp/imx/imx8m/adsp/memory.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8m/include/memory.h rename to soc/nxp/imx/imx8m/adsp/memory.h diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8m/include/pinctrl_soc.h b/soc/nxp/imx/imx8m/adsp/pinctrl_soc.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8m/include/pinctrl_soc.h rename to soc/nxp/imx/imx8m/adsp/pinctrl_soc.h diff --git a/soc/nxp/imx/imx8ulp/CMakeLists.txt b/soc/nxp/imx/imx8ulp/CMakeLists.txt new file mode 100644 index 00000000000000..55a7321827309b --- /dev/null +++ b/soc/nxp/imx/imx8ulp/CMakeLists.txt @@ -0,0 +1,23 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if(CONFIG_SOC_MIMX8ULP_ADSP) + zephyr_include_directories(adsp) + add_subdirectory(adsp) + + # west sign + + # See detailed comments in soc/intel/intel_adsp/common/CMakeLists.txt + add_custom_target(zephyr.ri ALL + DEPENDS ${CMAKE_BINARY_DIR}/zephyr/zephyr.ri + ) + + add_custom_command( + OUTPUT ${CMAKE_BINARY_DIR}/zephyr/zephyr.ri + COMMENT "west sign --if-tool-available --tool rimage ..." + COMMAND west sign --if-tool-available --tool rimage --build-dir ${CMAKE_BINARY_DIR} ${WEST_SIGN_OPTS} + DEPENDS ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_ELF_NAME} + ) + + set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/adsp/linker.ld CACHE INTERNAL "") +endif() diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.series b/soc/nxp/imx/imx8ulp/Kconfig similarity index 73% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.series rename to soc/nxp/imx/imx8ulp/Kconfig index 003784e842b144..5bee7c22107486 100644 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.series +++ b/soc/nxp/imx/imx8ulp/Kconfig @@ -1,9 +1,7 @@ -# Copyright (c) 2021 NXP +# Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 -config SOC_SERIES_NXP_IMX8 - bool "NXP i.MX8" - select SOC_FAMILY_NXP_ADSP +config SOC_MIMX8ULP_ADSP select XTENSA select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang") select XTENSA_RESET_VECTOR @@ -11,5 +9,3 @@ config SOC_SERIES_NXP_IMX8 select ATOMIC_OPERATIONS_BUILTIN select GEN_ISR_TABLES select XTENSA_SMALL_VECTOR_TABLE_ENTRY - help - NXP i.MX8 diff --git a/soc/nxp/imx/imx8ulp/Kconfig.defconfig b/soc/nxp/imx/imx8ulp/Kconfig.defconfig new file mode 100644 index 00000000000000..424892563afff1 --- /dev/null +++ b/soc/nxp/imx/imx8ulp/Kconfig.defconfig @@ -0,0 +1,45 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_IMX8ULP + +if SOC_MIMX8ULP_ADSP + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 528000000 + +config SYS_CLOCK_TICKS_PER_SEC + default 50000 + +config DCACHE_LINE_SIZE + default 128 + +config GEN_IRQ_VECTOR_TABLE + default n + +config CACHE_MANAGEMENT + default y + +config SMP + default n + +config XTENSA_TIMER + default y + +config KERNEL_ENTRY + default "__start" + +config MULTI_LEVEL_INTERRUPTS + default n + +config 2ND_LEVEL_INTERRUPTS + default n + +# To prevent test uses TEST_LOGGING_MINIMAL +config TEST_LOGGING_DEFAULTS + default n + depends on TEST + +endif # SOC_MIMX8ULP_ADSP + +endif # SOC_SERIES_IMX8ULP diff --git a/soc/nxp/imx/imx8ulp/Kconfig.soc b/soc/nxp/imx/imx8ulp/Kconfig.soc new file mode 100644 index 00000000000000..b7d4cadef7c6ff --- /dev/null +++ b/soc/nxp/imx/imx8ulp/Kconfig.soc @@ -0,0 +1,26 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_IMX8ULP + bool + select SOC_FAMILY_NXP_IMX + +config SOC_SERIES + default "imx8ulp" if SOC_SERIES_IMX8ULP + +config SOC_MIMX8ULP + bool + select SOC_SERIES_IMX8ULP + +config SOC + default "imx8ulp" if SOC_MIMX8ULP + +config SOC_MIMX8ULP_ADSP + bool + select SOC_MIMX8ULP + help + Enable support for NXP i.MX 8ULP Audio DSP + +config SOC_TOOLCHAIN_NAME + string + default "nxp_imx8ulp_adsp" if SOC_MIMX8ULP_ADSP diff --git a/soc/nxp/imx/imx8ulp/adsp/CMakeLists.txt b/soc/nxp/imx/imx8ulp/adsp/CMakeLists.txt new file mode 100644 index 00000000000000..a91c59914123ab --- /dev/null +++ b/soc/nxp/imx/imx8ulp/adsp/CMakeLists.txt @@ -0,0 +1,6 @@ +# NXP SoC family CMake file +# +# Copyright (c) 2021, 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(include) diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/include/_soc_inthandlers.h b/soc/nxp/imx/imx8ulp/adsp/_soc_inthandlers.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/include/_soc_inthandlers.h rename to soc/nxp/imx/imx8ulp/adsp/_soc_inthandlers.h diff --git a/soc/nxp/imx/imx8ulp/adsp/include/adsp/cache.h b/soc/nxp/imx/imx8ulp/adsp/include/adsp/cache.h new file mode 100644 index 00000000000000..067c08901403cf --- /dev/null +++ b/soc/nxp/imx/imx8ulp/adsp/include/adsp/cache.h @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __COMMON_ADSP_CACHE_H__ +#define __COMMON_ADSP_CACHE_H__ + +#include + +#endif diff --git a/soc/nxp/imx/imx8ulp/adsp/include/adsp/io.h b/soc/nxp/imx/imx8ulp/adsp/include/adsp/io.h new file mode 100644 index 00000000000000..3d1f0ed98d5a74 --- /dev/null +++ b/soc/nxp/imx/imx8ulp/adsp/include/adsp/io.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __INCLUDE_IO__ +#define __INCLUDE_IO__ + +#include +#include +#include +#include + +static inline uint32_t io_reg_read(uint32_t reg) +{ + return sys_read32(reg); +} + +static inline void io_reg_write(uint32_t reg, uint32_t val) +{ + sys_write32(val, reg); +} + +static inline void io_reg_update_bits(uint32_t reg, uint32_t mask, + uint32_t value) +{ + io_reg_write(reg, (io_reg_read(reg) & (~mask)) | (value & mask)); +} + +static inline uint16_t io_reg_read16(uint32_t reg) +{ + return sys_read16(reg); +} + +static inline void io_reg_write16(uint32_t reg, uint16_t val) +{ + sys_write16(val, reg); +} + +#endif diff --git a/soc/nxp/imx/imx8ulp/adsp/include/soc.h b/soc/nxp/imx/imx8ulp/adsp/include/soc.h new file mode 100644 index 00000000000000..89ee9d96a5207b --- /dev/null +++ b/soc/nxp/imx/imx8ulp/adsp/include/soc.h @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include + +#include + +#ifndef __INC_IMX_SOC_H +#define __INC_IMX_SOC_H + +/* Macros related to interrupt handling */ +#define XTENSA_IRQ_NUM_SHIFT 0 +#define XTENSA_IRQ_NUM_MASK 0xff + +/* + * IRQs are mapped on levels. 2nd, 3rd and 4th level are left as 0x00. + * + * 1. Peripheral Register bit offset. + */ +#define XTENSA_IRQ_NUMBER(_irq) \ + ((_irq >> XTENSA_IRQ_NUM_SHIFT) & XTENSA_IRQ_NUM_MASK) + +extern void z_soc_irq_enable(uint32_t irq); +extern void z_soc_irq_disable(uint32_t irq); +extern int z_soc_irq_is_enabled(unsigned int irq); + +#endif /* __INC_IMX_SOC_H */ diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/linker.ld b/soc/nxp/imx/imx8ulp/adsp/linker.ld similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/linker.ld rename to soc/nxp/imx/imx8ulp/adsp/linker.ld diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/include/memory.h b/soc/nxp/imx/imx8ulp/adsp/memory.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/include/memory.h rename to soc/nxp/imx/imx8ulp/adsp/memory.h diff --git a/soc/nxp/imx/imx8x/CMakeLists.txt b/soc/nxp/imx/imx8x/CMakeLists.txt new file mode 100644 index 00000000000000..af445cb9e57ca6 --- /dev/null +++ b/soc/nxp/imx/imx8x/CMakeLists.txt @@ -0,0 +1,27 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if(CONFIG_SOC_MIMX8QXP_ADSP) + zephyr_include_directories(adsp) + add_subdirectory(adsp) + + zephyr_sources( + adsp/pinctrl_soc.h + ) + + # west sign + + # See detailed comments in soc/intel/intel_adsp/common/CMakeLists.txt + add_custom_target(zephyr.ri ALL + DEPENDS ${CMAKE_BINARY_DIR}/zephyr/zephyr.ri + ) + + add_custom_command( + OUTPUT ${CMAKE_BINARY_DIR}/zephyr/zephyr.ri + COMMENT "west sign --if-tool-available --tool rimage ..." + COMMAND west sign --if-tool-available --tool rimage --build-dir ${CMAKE_BINARY_DIR} ${WEST_SIGN_OPTS} + DEPENDS ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_ELF_NAME} + ) + + set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/adsp/linker.ld CACHE INTERNAL "") +endif() diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/Kconfig.series b/soc/nxp/imx/imx8x/Kconfig similarity index 64% rename from soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/Kconfig.series rename to soc/nxp/imx/imx8x/Kconfig index 34e9b3a1a1dbc3..b5c9a4e446efd1 100644 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/Kconfig.series +++ b/soc/nxp/imx/imx8x/Kconfig @@ -1,9 +1,7 @@ -# Copyright (c) 2023 NXP +# Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 -config SOC_SERIES_NXP_IMX8ULP - bool "NXP i.MX8ULP Audio DSP Series" - select SOC_FAMILY_NXP_ADSP +config SOC_MIMX8QXP_ADSP select XTENSA select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang") select XTENSA_RESET_VECTOR @@ -11,5 +9,7 @@ config SOC_SERIES_NXP_IMX8ULP select ATOMIC_OPERATIONS_BUILTIN select GEN_ISR_TABLES select XTENSA_SMALL_VECTOR_TABLE_ENTRY - help - Enable support for NXP i.MX8ULP Audio DSP + select HAS_MCUX + +config MCUX_CORE_SUFFIX + default "_dsp" if SOC_MIMX8QXP_ADSP diff --git a/soc/nxp/imx/imx8x/Kconfig.defconfig b/soc/nxp/imx/imx8x/Kconfig.defconfig new file mode 100644 index 00000000000000..2e3699d95321a9 --- /dev/null +++ b/soc/nxp/imx/imx8x/Kconfig.defconfig @@ -0,0 +1,45 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_IMX8X + +if SOC_MIMX8QXP_ADSP + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 640000000 + +config SYS_CLOCK_TICKS_PER_SEC + default 50000 + +config DCACHE_LINE_SIZE + default 128 + +config GEN_IRQ_VECTOR_TABLE + default n + +config CACHE_MANAGEMENT + default y + +config SMP + default n + +config XTENSA_TIMER + default y + +config KERNEL_ENTRY + default "__start" + +config MULTI_LEVEL_INTERRUPTS + default n + +config 2ND_LEVEL_INTERRUPTS + default n + +# To prevent test uses TEST_LOGGING_MINIMAL +config TEST_LOGGING_DEFAULTS + default n + depends on TEST + +endif # SOC_MIMX8QXP_ADSP + +endif # SOC_SERIES_IMX8X diff --git a/soc/nxp/imx/imx8x/Kconfig.soc b/soc/nxp/imx/imx8x/Kconfig.soc new file mode 100644 index 00000000000000..dc3c3de187fb52 --- /dev/null +++ b/soc/nxp/imx/imx8x/Kconfig.soc @@ -0,0 +1,36 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_IMX8X + bool + select SOC_FAMILY_NXP_IMX + +config SOC_SERIES + default "imx8x" if SOC_SERIES_IMX8X + +config SOC_MIMX8QXP + bool + select SOC_SERIES_IMX8X + +config SOC + default "mimx8qx6" if SOC_MIMX8QXP + +config SOC_MIMX8QXP_ADSP + bool + select SOC_MIMX8QXP + help + Enable support for NXP i.MX 8QXP Audio DSP + +config SOC_TOOLCHAIN_NAME + string + default "nxp_imx_adsp" if SOC_MIMX8QXP_ADSP + +config SOC_PART_NUMBER_MIMX8QX6AVLFZ + bool + +config SOC_PART_NUMBER_MIMX8QX6CVLDZ + bool + +config SOC_PART_NUMBER + default "MIMX8QX6AVLFZ" if SOC_PART_NUMBER_MIMX8QX6AVLFZ + default "MIMX8QX6CVLDZ" if SOC_PART_NUMBER_MIMX8QX6CVLDZ diff --git a/soc/nxp/imx/imx8x/adsp/CMakeLists.txt b/soc/nxp/imx/imx8x/adsp/CMakeLists.txt new file mode 100644 index 00000000000000..a91c59914123ab --- /dev/null +++ b/soc/nxp/imx/imx8x/adsp/CMakeLists.txt @@ -0,0 +1,6 @@ +# NXP SoC family CMake file +# +# Copyright (c) 2021, 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(include) diff --git a/soc/nxp/imx/imx8x/adsp/_soc_inthandlers.h b/soc/nxp/imx/imx8x/adsp/_soc_inthandlers.h new file mode 100644 index 00000000000000..daa9cfe668b416 --- /dev/null +++ b/soc/nxp/imx/imx8x/adsp/_soc_inthandlers.h @@ -0,0 +1,177 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* + * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT. + * + * Functions here are designed to produce efficient code to + * search an Xtensa bitmask of interrupts, inspecting only those bits + * declared to be associated with a given interrupt level. Each + * dispatcher will handle exactly one flagged interrupt, in numerical + * order (low bits first) and will return a mask of that bit that can + * then be cleared by the calling code. Unrecognized bits for the + * level will invoke an error handler. + */ + +#include +#include +#include + +#if !defined(XCHAL_INT0_LEVEL) || XCHAL_INT0_LEVEL != 5 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT1_LEVEL) || XCHAL_INT1_LEVEL != 3 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT2_LEVEL) || XCHAL_INT2_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT3_LEVEL) || XCHAL_INT3_LEVEL != 3 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT4_LEVEL) || XCHAL_INT4_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT5_LEVEL) || XCHAL_INT5_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT6_LEVEL) || XCHAL_INT6_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT7_LEVEL) || XCHAL_INT7_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT8_LEVEL) || XCHAL_INT8_LEVEL != 1 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT9_LEVEL) || XCHAL_INT9_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT10_LEVEL) || XCHAL_INT10_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT11_LEVEL) || XCHAL_INT11_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT12_LEVEL) || XCHAL_INT12_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT13_LEVEL) || XCHAL_INT13_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT14_LEVEL) || XCHAL_INT14_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT15_LEVEL) || XCHAL_INT15_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT16_LEVEL) || XCHAL_INT16_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT17_LEVEL) || XCHAL_INT17_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT18_LEVEL) || XCHAL_INT18_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT19_LEVEL) || XCHAL_INT19_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif +#if !defined(XCHAL_INT20_LEVEL) || XCHAL_INT20_LEVEL != 2 +#error core-isa.h interrupt level does not match dispatcher! +#endif + +static inline int _xtensa_handle_one_int1(unsigned int mask) +{ + int irq; + + if (mask & BIT(8)) { + mask = BIT(8); + irq = 8; + goto handle_irq; + } + return 0; +handle_irq: + _sw_isr_table[irq].isr(_sw_isr_table[irq].arg); + return mask; +} + +static inline int _xtensa_handle_one_int2(unsigned int mask) +{ + int irq; + int i = 0; + + mask &= XCHAL_INTLEVEL2_MASK; + for (i = 0; i <= 31; i++) + if (mask & BIT(i)) { + mask = BIT(i); + irq = i; + goto handle_irq; + } + return 0; +handle_irq: + _sw_isr_table[irq].isr(_sw_isr_table[irq].arg); + return mask; +} + +static inline int _xtensa_handle_one_int3(unsigned int mask) +{ + int irq; + + if (mask & BIT(1)) { + mask = BIT(1); + irq = 1; + goto handle_irq; + } + if (mask & BIT(3)) { + mask = BIT(3); + irq = 3; + goto handle_irq; + } + if (mask & BIT(31)) { + mask = BIT(31); + irq = 31; + goto handle_irq; + } + return 0; +handle_irq: + _sw_isr_table[irq].isr(_sw_isr_table[irq].arg); + return mask; +} + +static inline int _xtensa_handle_one_int5(unsigned int mask) +{ + int irq; + + if (mask & BIT(0)) { + mask = BIT(0); + irq = 0; + goto handle_irq; + } + return 0; +handle_irq: + _sw_isr_table[irq].isr(_sw_isr_table[irq].arg); + return mask; +} + +static inline int _xtensa_handle_one_int0(unsigned int mask) +{ + return 0; +} + +static inline int _xtensa_handle_one_int4(unsigned int mask) +{ + return 0; +} + +static inline int _xtensa_handle_one_int6(unsigned int mask) +{ + return 0; +} + +static inline int _xtensa_handle_one_int7(unsigned int mask) +{ + return 0; +} diff --git a/soc/nxp/imx/imx8x/adsp/include/adsp/cache.h b/soc/nxp/imx/imx8x/adsp/include/adsp/cache.h new file mode 100644 index 00000000000000..067c08901403cf --- /dev/null +++ b/soc/nxp/imx/imx8x/adsp/include/adsp/cache.h @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __COMMON_ADSP_CACHE_H__ +#define __COMMON_ADSP_CACHE_H__ + +#include + +#endif diff --git a/soc/nxp/imx/imx8x/adsp/include/adsp/io.h b/soc/nxp/imx/imx8x/adsp/include/adsp/io.h new file mode 100644 index 00000000000000..3d1f0ed98d5a74 --- /dev/null +++ b/soc/nxp/imx/imx8x/adsp/include/adsp/io.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __INCLUDE_IO__ +#define __INCLUDE_IO__ + +#include +#include +#include +#include + +static inline uint32_t io_reg_read(uint32_t reg) +{ + return sys_read32(reg); +} + +static inline void io_reg_write(uint32_t reg, uint32_t val) +{ + sys_write32(val, reg); +} + +static inline void io_reg_update_bits(uint32_t reg, uint32_t mask, + uint32_t value) +{ + io_reg_write(reg, (io_reg_read(reg) & (~mask)) | (value & mask)); +} + +static inline uint16_t io_reg_read16(uint32_t reg) +{ + return sys_read16(reg); +} + +static inline void io_reg_write16(uint32_t reg, uint16_t val) +{ + sys_write16(val, reg); +} + +#endif diff --git a/soc/nxp/imx/imx8x/adsp/include/soc.h b/soc/nxp/imx/imx8x/adsp/include/soc.h new file mode 100644 index 00000000000000..89ee9d96a5207b --- /dev/null +++ b/soc/nxp/imx/imx8x/adsp/include/soc.h @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include + +#include + +#ifndef __INC_IMX_SOC_H +#define __INC_IMX_SOC_H + +/* Macros related to interrupt handling */ +#define XTENSA_IRQ_NUM_SHIFT 0 +#define XTENSA_IRQ_NUM_MASK 0xff + +/* + * IRQs are mapped on levels. 2nd, 3rd and 4th level are left as 0x00. + * + * 1. Peripheral Register bit offset. + */ +#define XTENSA_IRQ_NUMBER(_irq) \ + ((_irq >> XTENSA_IRQ_NUM_SHIFT) & XTENSA_IRQ_NUM_MASK) + +extern void z_soc_irq_enable(uint32_t irq); +extern void z_soc_irq_disable(uint32_t irq); +extern int z_soc_irq_is_enabled(unsigned int irq); + +#endif /* __INC_IMX_SOC_H */ diff --git a/soc/nxp/imx/imx8x/adsp/linker.ld b/soc/nxp/imx/imx8x/adsp/linker.ld new file mode 100644 index 00000000000000..52d3a46b2381a9 --- /dev/null +++ b/soc/nxp/imx/imx8x/adsp/linker.ld @@ -0,0 +1,517 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief Linker command/script file + * + * Linker script for the NXP i.MX8 platform + */ + +OUTPUT_ARCH(xtensa) + +#include +#include +#include +#include + +#include +#include + +PROVIDE(__memctl_default = 0x00000000); +PROVIDE(_MemErrorHandler = 0x00000000); + +#define RAMABLE_REGION sdram0 :sdram0_phdr +#define ROMABLE_REGION sdram0 :sdram0_phdr + +MEMORY +{ + vector_reset_text : + org = XCHAL_RESET_VECTOR0_PADDR_IRAM, + len = MEM_RESET_TEXT_SIZE + vector_reset_lit : + org = XCHAL_RESET_VECTOR0_PADDR_IRAM + MEM_RESET_TEXT_SIZE, + len = MEM_RESET_LIT_SIZE + vector_base_text : + org = XCHAL_VECBASE_RESET_PADDR_IRAM, + len = MEM_VECBASE_LIT_SIZE + vector_int2_lit : + org = XCHAL_INTLEVEL2_VECTOR_PADDR_IRAM - MEM_VECT_LIT_SIZE, + len = MEM_VECT_LIT_SIZE + vector_int2_text : + org = XCHAL_INTLEVEL2_VECTOR_PADDR_IRAM, + len = MEM_VECT_TEXT_SIZE + vector_int3_lit : + org = XCHAL_INTLEVEL3_VECTOR_PADDR_IRAM - MEM_VECT_LIT_SIZE, + len = MEM_VECT_LIT_SIZE + vector_int3_text : + org = XCHAL_INTLEVEL3_VECTOR_PADDR_IRAM, + len = MEM_VECT_TEXT_SIZE + vector_int4_lit : + org = XCHAL_INTLEVEL4_VECTOR_PADDR_IRAM - MEM_VECT_LIT_SIZE, + len = MEM_VECT_LIT_SIZE + vector_int4_text : + org = XCHAL_INTLEVEL4_VECTOR_PADDR_IRAM, + len = MEM_VECT_TEXT_SIZE + vector_int5_lit : + org = XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM - MEM_VECT_LIT_SIZE, + len = MEM_VECT_LIT_SIZE + vector_int5_text : + org = XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM, + len = MEM_VECT_TEXT_SIZE + vector_kernel_lit : + org = XCHAL_KERNEL_VECTOR_PADDR_IRAM - MEM_VECT_LIT_SIZE, + len = MEM_VECT_LIT_SIZE + vector_kernel_text : + org = XCHAL_KERNEL_VECTOR_PADDR_IRAM, + len = MEM_VECT_TEXT_SIZE + vector_user_lit : + org = XCHAL_USER_VECTOR_PADDR_IRAM - MEM_VECT_LIT_SIZE, + len = MEM_VECT_LIT_SIZE + vector_user_text : + org = XCHAL_USER_VECTOR_PADDR_IRAM, + len = MEM_VECT_TEXT_SIZE + vector_double_lit : + org = XCHAL_DOUBLEEXC_VECTOR_PADDR_IRAM - MEM_VECT_LIT_SIZE, + len = MEM_VECT_LIT_SIZE + vector_double_text : + org = XCHAL_DOUBLEEXC_VECTOR_PADDR_IRAM, + len = MEM_VECT_TEXT_SIZE + iram_text_start : + org = XCHAL_DOUBLEEXC_VECTOR_PADDR_IRAM + MEM_VECT_TEXT_SIZE, + len = (IRAM_BASE + IRAM_SIZE) - (XCHAL_DOUBLEEXC_VECTOR_PADDR + MEM_VECT_TEXT_SIZE) + sdram0 : + org = SDRAM0_BASE, + len = SDRAM0_SIZE + sdram1 : + org = SDRAM1_BASE + SOF_MAILBOX_SIZE, + len = SDRAM1_SIZE - SOF_MAILBOX_SIZE +#ifdef CONFIG_GEN_ISR_TABLES + IDT_LIST : + org = IDT_BASE, + len = IDT_SIZE +#endif + + static_uuid_entries_seg (!ari) : + org = UUID_ENTRY_ELF_BASE, + len = UUID_ENTRY_ELF_SIZE + static_log_entries_seg (!ari) : + org = LOG_ENTRY_ELF_BASE, + len = LOG_ENTRY_ELF_SIZE + fw_metadata_seg (!ari) : + org = EXT_MANIFEST_ELF_BASE, + len = EXT_MANIFEST_ELF_SIZE +} + +PHDRS +{ + vector_reset_text_phdr PT_LOAD; + vector_reset_lit_phdr PT_LOAD; + vector_base_text_phdr PT_LOAD; + vector_base_lit_phdr PT_LOAD; + vector_int2_text_phdr PT_LOAD; + vector_int2_lit_phdr PT_LOAD; + vector_int3_text_phdr PT_LOAD; + vector_int3_lit_phdr PT_LOAD; + vector_int4_text_phdr PT_LOAD; + vector_int4_lit_phdr PT_LOAD; + vector_int5_text_phdr PT_LOAD; + vector_int5_lit_phdr PT_LOAD; + vector_kernel_text_phdr PT_LOAD; + vector_kernel_lit_phdr PT_LOAD; + vector_user_text_phdr PT_LOAD; + vector_user_lit_phdr PT_LOAD; + vector_double_text_phdr PT_LOAD; + vector_double_lit_phdr PT_LOAD; + iram_text_start_phdr PT_LOAD; + sdram0_phdr PT_LOAD; + sdram1_phdr PT_LOAD; + static_uuid_entries_phdr PT_NOTE; + static_log_entries_phdr PT_NOTE; + metadata_entries_phdr PT_NOTE; +} + +_rom_store_table = 0; + +PROVIDE(_memmap_vecbase_reset = XCHAL_VECBASE_RESET_PADDR); + +ENTRY(CONFIG_KERNEL_ENTRY) + +/* Various memory-map dependent cache attribute settings: */ +_memmap_cacheattr_wb_base = 0x44024000; +_memmap_cacheattr_wt_base = 0x11021000; +_memmap_cacheattr_bp_base = 0x22022000; +_memmap_cacheattr_unused_mask = 0x00F00FFF; +_memmap_cacheattr_wb_trapnull = 0x4422422F; +_memmap_cacheattr_wba_trapnull = 0x4422422F; +_memmap_cacheattr_wbna_trapnull = 0x25222222; +_memmap_cacheattr_wt_trapnull = 0x1122122F; +_memmap_cacheattr_bp_trapnull = 0x2222222F; +_memmap_cacheattr_wb_strict = 0x44F24FFF; +_memmap_cacheattr_wt_strict = 0x11F21FFF; +_memmap_cacheattr_bp_strict = 0x22F22FFF; +_memmap_cacheattr_wb_allvalid = 0x44224222; +_memmap_cacheattr_wt_allvalid = 0x11221222; +_memmap_cacheattr_bp_allvalid = 0x22222222; +/* + * Every 512M in 4GB space has dedicate cache attribute. + * 1: write through + * 2: cache bypass + * 4: write back + * F: invalid access + */ +_memmap_cacheattr_imx8_wt_allvalid = 0x22212222; +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_imx8_wt_allvalid); + +_EXT_MAN_ALIGN_ = 16; +EXTERN(ext_man_fw_ver) + +SECTIONS +{ + +#include + .ResetVector.text : ALIGN(4) + { + _ResetVector_text_start = ABSOLUTE(.); + KEEP (*(.ResetVector.text)) + _ResetVector_text_end = ABSOLUTE(.); + } >vector_reset_text :vector_reset_text_phdr + + .ResetVector.literal : ALIGN(4) + { + _ResetVector_literal_start = ABSOLUTE(.); + *(.ResetVector.literal) + _ResetVector_literal_end = ABSOLUTE(.); + } >vector_reset_lit :vector_reset_lit_phdr + + .WindowVectors.text : ALIGN(4) + { + _WindowVectors_text_start = ABSOLUTE(.); + KEEP (*(.WindowVectors.text)) + _WindowVectors_text_end = ABSOLUTE(.); + } >vector_base_text :vector_base_text_phdr + + .Level2InterruptVector.literal : ALIGN(4) + { + _Level2InterruptVector_literal_start = ABSOLUTE(.); + *(.Level2InterruptVector.literal) + _Level2InterruptVector_literal_end = ABSOLUTE(.); + } >vector_int2_lit :vector_int2_lit_phdr + + .Level2InterruptVector.text : ALIGN(4) + { + _Level2InterruptVector_text_start = ABSOLUTE(.); + KEEP (*(.Level2InterruptVector.text)) + _Level2InterruptVector_text_end = ABSOLUTE(.); + } >vector_int2_text :vector_int2_text_phdr + + .Level3InterruptVector.literal : ALIGN(4) + { + _Level3InterruptVector_literal_start = ABSOLUTE(.); + *(.Level3InterruptVector.literal) + _Level3InterruptVector_literal_end = ABSOLUTE(.); + } >vector_int3_lit :vector_int3_lit_phdr + + .Level3InterruptVector.text : ALIGN(4) + { + _Level3InterruptVector_text_start = ABSOLUTE(.); + KEEP (*(.Level3InterruptVector.text)) + _Level3InterruptVector_text_end = ABSOLUTE(.); + } >vector_int3_text :vector_int3_text_phdr + + .DebugExceptionVector.literal : ALIGN(4) + { + _DebugExceptionVector_literal_start = ABSOLUTE(.); + *(.DebugExceptionVector.literal) + _DebugExceptionVector_literal_end = ABSOLUTE(.); + } >vector_int4_lit :vector_int4_lit_phdr + + .DebugExceptionVector.text : ALIGN(4) + { + _DebugExceptionVector_text_start = ABSOLUTE(.); + KEEP (*(.DebugExceptionVector.text)) + _DebugExceptionVector_text_end = ABSOLUTE(.); + } >vector_int4_text :vector_int4_text_phdr + + .NMIExceptionVector.literal : ALIGN(4) + { + _NMIExceptionVector_literal_start = ABSOLUTE(.); + *(.NMIExceptionVector.literal) + _NMIExceptionVector_literal_end = ABSOLUTE(.); + } >vector_int5_lit :vector_int5_lit_phdr + + .NMIExceptionVector.text : ALIGN(4) + { + _NMIExceptionVector_text_start = ABSOLUTE(.); + KEEP (*(.NMIExceptionVector.text)) + _NMIExceptionVector_text_end = ABSOLUTE(.); + } >vector_int5_text :vector_int5_text_phdr + + .KernelExceptionVector.literal : ALIGN(4) + { + _KernelExceptionVector_literal_start = ABSOLUTE(.); + *(.KernelExceptionVector.literal) + _KernelExceptionVector_literal_end = ABSOLUTE(.); + } >vector_kernel_lit :vector_kernel_lit_phdr + + .KernelExceptionVector.text : ALIGN(4) + { + _KernelExceptionVector_text_start = ABSOLUTE(.); + KEEP (*(.KernelExceptionVector.text)) + _KernelExceptionVector_text_end = ABSOLUTE(.); + } >vector_kernel_text :vector_kernel_text_phdr + + .UserExceptionVector.literal : ALIGN(4) + { + _UserExceptionVector_literal_start = ABSOLUTE(.); + *(.UserExceptionVector.literal) + _UserExceptionVector_literal_end = ABSOLUTE(.); + } >vector_user_lit :vector_user_lit_phdr + + .UserExceptionVector.text : ALIGN(4) + { + _UserExceptionVector_text_start = ABSOLUTE(.); + KEEP (*(.UserExceptionVector.text)) + _UserExceptionVector_text_end = ABSOLUTE(.); + } >vector_user_text :vector_user_text_phdr + + .DoubleExceptionVector.literal : ALIGN(4) + { + _DoubleExceptionVector_literal_start = ABSOLUTE(.); + *(.DoubleExceptionVector.literal) + _DoubleExceptionVector_literal_end = ABSOLUTE(.); + } >vector_double_lit :vector_double_lit_phdr + + .DoubleExceptionVector.text : ALIGN(4) + { + _DoubleExceptionVector_text_start = ABSOLUTE(.); + KEEP (*(.DoubleExceptionVector.text)) + _DoubleExceptionVector_text_end = ABSOLUTE(.); + } >vector_double_text :vector_double_text_phdr + + .iram.text : ALIGN(4) + { + _stext = .; + _iram_text_start = ABSOLUTE(.); + *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text) + _iram_text_end = ABSOLUTE(.); + } >iram_text_start :iram_text_start_phdr + + .rodata : ALIGN(4) + { + __rodata_region_start = ABSOLUTE(.); + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); + KEEP (*(.xt_except_table)) + KEEP (*(.gcc_except_table .gcc_except_table.*)) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + KEEP (*(.eh_frame)) + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); + _bss_table_start = ABSOLUTE(.); + LONG(_bss_start) + LONG(_bss_end) + _bss_table_end = ABSOLUTE(.); + __rodata_region_end = ABSOLUTE(.); + } >sdram0 :sdram0_phdr + + .module_init : ALIGN(4) + { + _module_init_start = ABSOLUTE(.); + *(*.initcall) + _module_init_end = ABSOLUTE(.); + } >sdram0 :sdram0_phdr + + .text : ALIGN(4) + { + _stext = .; + __text_region_start = ABSOLUTE(.); + KEEP (*(.ResetVector.text)) + *(.ResetVector.literal) + *(.entry.text) + *(.init.literal) + KEEP(*(.init)) + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) + *(.fini.literal) + KEEP(*(.fini)) + *(.gnu.version) + __text_region_end = ABSOLUTE(.); + _etext = .; + } >sdram0 :sdram0_phdr + +#include + + .fw_ready : ALIGN(4) + { + KEEP(*(".fw_ready")); + KEEP (*(.fw_ready_metadata)) + } >sdram0 :sdram0_phdr + + .noinit : ALIGN(4) + { + *(.noinit) + *(.noinit.*) + } >sdram0 :sdram0_phdr + + .data : ALIGN(4) + { + __data_start = ABSOLUTE(.); + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + KEEP(*(.gnu.linkonce.d.*personality*)) + *(.data1) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + KEEP(*(.jcr)) + _trace_ctx_start = ABSOLUTE(.); + *(.trace_ctx) + _trace_ctx_end = ABSOLUTE(.); + . = ALIGN(4); + *(.gna_model) + __data_end = ABSOLUTE(.); + . = ALIGN(4096); + } >sdram0 :sdram0_phdr + + .lit4 : ALIGN(4) + { + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + } >sdram0 :sdram0_phdr + +#include + + .bss (NOLOAD) : ALIGN(8) + { + . = ALIGN (8); + _bss_start = ABSOLUTE(.); + *(.dynsbss) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN (8); + _bss_end = ABSOLUTE(.); + } >sdram0 :sdram0_phdr + + .heap_mem (NOLOAD) : ALIGN(8) + { + . = ALIGN (8); + _heap_mem_start = ABSOLUTE(.); + *(*.heap_mem) + _heap_mem_end = ABSOLUTE(.); + } >sdram1 :sdram1_phdr + + /* stack */ + _end = ALIGN (8); + PROVIDE(end = ALIGN (8)); + + __stack = SDRAM1_BASE + SDRAM1_SIZE; + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .debug_ranges 0 : { *(.debug_ranges) } + .xtensa.info 0 : { *(.xtensa.info) } + .xt.insn 0 : + { + KEEP (*(.xt.insn)) + KEEP (*(.gnu.linkonce.x.*)) + } + .xt.prop 0 : + { + KEEP (*(.xt.prop)) + KEEP (*(.xt.prop.*)) + KEEP (*(.gnu.linkonce.prop.*)) + } + .xt.lit 0 : + { + KEEP (*(.xt.lit)) + KEEP (*(.xt.lit.*)) + KEEP (*(.gnu.linkonce.p.*)) + } + .xt.profile_range 0 : + { + KEEP (*(.xt.profile_range)) + KEEP (*(.gnu.linkonce.profile_range.*)) + } + .xt.profile_ranges 0 : + { + KEEP (*(.xt.profile_ranges)) + KEEP (*(.gnu.linkonce.xt.profile_ranges.*)) + } + .xt.profile_files 0 : + { + KEEP (*(.xt.profile_files)) + KEEP (*(.gnu.linkonce.xt.profile_files.*)) + } +#ifdef CONFIG_GEN_ISR_TABLES +#include +#endif + + .static_uuid_entries (COPY) : ALIGN(1024) + { + *(*.static_uuids) + } > static_uuid_entries_seg :static_uuid_entries_phdr + + .static_log_entries (COPY) : ALIGN(1024) + { + *(*.static_log*) + } > static_log_entries_seg :static_log_entries_phdr + + .fw_metadata (COPY) : ALIGN(1024) + { + KEEP (*(.fw_metadata)) + . = ALIGN(_EXT_MAN_ALIGN_); + } >fw_metadata_seg :metadata_entries_phdr +} diff --git a/soc/nxp/imx/imx8x/adsp/memory.h b/soc/nxp/imx/imx8x/adsp/memory.h new file mode 100644 index 00000000000000..56bac21c780b14 --- /dev/null +++ b/soc/nxp/imx/imx8x/adsp/memory.h @@ -0,0 +1,162 @@ +/* + * Copyright (c) 2021 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_SOC_NXP_ADSP_MEMORY_H_ +#define ZEPHYR_SOC_NXP_ADSP_MEMORY_H_ + +#define IRAM_RESERVE_HEADER_SPACE 0x400 + +#define IRAM_BASE 0x596f8000 +#define IRAM_SIZE 0x800 + +#define SDRAM0_BASE 0x92400000 +#define SDRAM0_SIZE 0x800000 + +#define SDRAM1_BASE 0x92C00000 +#define SDRAM1_SIZE 0x800000 + +/* The reset vector address in SRAM and its size */ +#define MEM_RESET_TEXT_SIZE 0x2e0 +#define MEM_RESET_LIT_SIZE 0x120 + +/* This is the base address of all the vectors defined in IRAM */ +#define XCHAL_VECBASE_RESET_PADDR_IRAM \ + (IRAM_BASE + IRAM_RESERVE_HEADER_SPACE) + +#define MEM_VECBASE_LIT_SIZE 0x178 + +/* + * EXCEPTIONS and VECTORS + */ +#define XCHAL_RESET_VECTOR0_PADDR_IRAM 0x596F8000 + +/* Vector and literal sizes */ +#define MEM_VECT_LIT_SIZE 0x4 +#define MEM_VECT_TEXT_SIZE 0x1C +#define MEM_VECT_SIZE (MEM_VECT_TEXT_SIZE +\ + MEM_VECT_LIT_SIZE) + +/* The addresses of the vectors. + * Only the mem_error vector continues to point to its ROM address. + */ +#define XCHAL_INTLEVEL2_VECTOR_PADDR_IRAM \ + (XCHAL_VECBASE_RESET_PADDR_IRAM + 0x17C) + +#define XCHAL_INTLEVEL3_VECTOR_PADDR_IRAM \ + (XCHAL_VECBASE_RESET_PADDR_IRAM + 0x19C) + +#define XCHAL_INTLEVEL4_VECTOR_PADDR_IRAM \ + (XCHAL_VECBASE_RESET_PADDR_IRAM + 0x1BC) + +#define XCHAL_INTLEVEL5_VECTOR_PADDR_IRAM \ + (XCHAL_VECBASE_RESET_PADDR_IRAM + 0x1DC) + +#define XCHAL_KERNEL_VECTOR_PADDR_IRAM \ + (XCHAL_VECBASE_RESET_PADDR_IRAM + 0x1FC) + +#define XCHAL_USER_VECTOR_PADDR_IRAM \ + (XCHAL_VECBASE_RESET_PADDR_IRAM + 0x21C) + +#define XCHAL_DOUBLEEXC_VECTOR_PADDR_IRAM \ + (XCHAL_VECBASE_RESET_PADDR_IRAM + 0x23C) + +/* Location for the intList section which is later used to construct the + * Interrupt Descriptor Table (IDT). This is a bogus address as this + * section will be stripped off in the final image. + */ +#define IDT_BASE (IRAM_BASE + IRAM_SIZE) + +/* size of the Interrupt Descriptor Table (IDT) */ +#define IDT_SIZE 0x2000 + +/* physical DSP addresses */ +#define IRAM_BASE 0x596f8000 +#define IRAM_SIZE 0x800 + +#define DRAM0_BASE 0x596e8000 +#define DRAM0_SIZE 0x8000 + +#define DRAM1_BASE 0x596f0000 +#define DRAM1_SIZE 0x8000 + +#define SDRAM0_BASE 0x92400000 +#define SDRAM0_SIZE 0x800000 + +#define SDRAM1_BASE 0x92C00000 +#define SDRAM1_SIZE 0x800000 + +#define XSHAL_MU13_SIDEB_BYPASS_PADDR 0x5D310000 +#define MU_BASE XSHAL_MU13_SIDEB_BYPASS_PADDR + +#define EDMA0_BASE 0x59200000 +#define EDMA0_SIZE 0x10000 + +#define ESAI_BASE 0x59010000 +#define ESAI_SIZE 0x00010000 + +#define SAI_1_BASE 0x59050000 +#define SAI_1_SIZE 0x00010000 + +#define UUID_ENTRY_ELF_BASE 0x1FFFA000 +#define UUID_ENTRY_ELF_SIZE 0x6000 + +#define LOG_ENTRY_ELF_BASE 0x20000000 +#define LOG_ENTRY_ELF_SIZE 0x2000000 + +#define EXT_MANIFEST_ELF_BASE (LOG_ENTRY_ELF_BASE + LOG_ENTRY_ELF_SIZE) +#define EXT_MANIFEST_ELF_SIZE 0x2000000 + +/* + * The Heap and Stack on i.MX8 are organized like this :- + * + * +--------------------------------------------------------------------------+ + * | Offset | Region | Size | + * +---------------------+----------------+-----------------------------------+ + * | SDRAM_BASE | RO Data | SOF_DATA_SIZE | + * | | Data | | + * | | BSS | | + * +---------------------+----------------+-----------------------------------+ + * | HEAP_SYSTEM_BASE | System Heap | HEAP_SYSTEM_SIZE | + * +---------------------+----------------+-----------------------------------+ + * | HEAP_RUNTIME_BASE | Runtime Heap | HEAP_RUNTIME_SIZE | + * +---------------------+----------------+-----------------------------------+ + * | HEAP_BUFFER_BASE | Module Buffers | HEAP_BUFFER_SIZE | + * +---------------------+----------------+-----------------------------------+ + * | SOF_STACK_END | Stack | SOF_STACK_SIZE | + * +---------------------+----------------+-----------------------------------+ + * | SOF_STACK_BASE | | | + * +---------------------+----------------+-----------------------------------+ + */ + +#define SRAM_OUTBOX_BASE SDRAM1_BASE +#define SRAM_OUTBOX_SIZE 0x1000 +#define SRAM_OUTBOX_OFFSET 0 + +#define SRAM_INBOX_BASE (SRAM_OUTBOX_BASE + SRAM_OUTBOX_SIZE) +#define SRAM_INBOX_SIZE 0x1000 +#define SRAM_INBOX_OFFSET SRAM_OUTBOX_SIZE + +#define SRAM_DEBUG_BASE (SRAM_INBOX_BASE + SRAM_INBOX_SIZE) +#define SRAM_DEBUG_SIZE 0x800 +#define SRAM_DEBUG_OFFSET (SRAM_INBOX_OFFSET + SRAM_INBOX_SIZE) + +#define SRAM_EXCEPT_BASE (SRAM_DEBUG_BASE + SRAM_DEBUG_SIZE) +#define SRAM_EXCEPT_SIZE 0x800 +#define SRAM_EXCEPT_OFFSET (SRAM_DEBUG_OFFSET + SRAM_DEBUG_SIZE) + +#define SRAM_STREAM_BASE (SRAM_EXCEPT_BASE + SRAM_EXCEPT_SIZE) +#define SRAM_STREAM_SIZE 0x1000 +#define SRAM_STREAM_OFFSET (SRAM_EXCEPT_OFFSET + SRAM_EXCEPT_SIZE) + +#define SRAM_TRACE_BASE (SRAM_STREAM_BASE + SRAM_STREAM_SIZE) +#define SRAM_TRACE_SIZE 0x1000 +#define SRAM_TRACE_OFFSET (SRAM_STREAM_OFFSET + SRAM_STREAM_SIZE) + +#define SOF_MAILBOX_SIZE (SRAM_INBOX_SIZE + SRAM_OUTBOX_SIZE \ + + SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE \ + + SRAM_STREAM_SIZE + SRAM_TRACE_SIZE) + +#endif /* ZEPHYR_SOC_NXP_ADSP_MEMORY_H_ */ diff --git a/soc/nxp/imx/imx8x/adsp/pinctrl_soc.h b/soc/nxp/imx/imx8x/adsp/pinctrl_soc.h new file mode 100644 index 00000000000000..ac748220b56055 --- /dev/null +++ b/soc/nxp/imx/imx8x/adsp/pinctrl_soc.h @@ -0,0 +1,41 @@ +/* + * Copyright 2023 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_SOC_XTENSA_NXP_ADSP_IMX8_PINCTRL_SOC_H_ +#define ZEPHYR_SOC_XTENSA_NXP_ADSP_IMX8_PINCTRL_SOC_H_ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +struct pinctrl_soc_pinmux { + uint32_t pad; + uint32_t mux; +}; + +typedef struct pinctrl_soc_pinmux pinctrl_soc_pin_t; + +#define IMX8_PINMUX(n) \ +{ \ + .pad = DT_PROP_BY_IDX(n, pinmux, 0), \ + .mux = DT_PROP_BY_IDX(n, pinmux, 1), \ +}, + +#define Z_PINCTRL_PINMUX(group_id, pin_prop, idx)\ + IMX8_PINMUX(DT_PHANDLE_BY_IDX(group_id, pin_prop, idx)) + +#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ + { DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \ + DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_PINMUX) }; + +#ifdef __cplusplus +} +#endif + +#endif /* ZEPHYR_SOC_XTENSA_NXP_ADSP_IMX8_PINCTRL_SOC_H_ */ diff --git a/soc/nxp/imx/imx9/Kconfig.soc b/soc/nxp/imx/imx9/Kconfig.soc index 71da674a74585b..667e3fc1f0b237 100644 --- a/soc/nxp/imx/imx9/Kconfig.soc +++ b/soc/nxp/imx/imx9/Kconfig.soc @@ -3,7 +3,7 @@ config SOC_SERIES_IMX9 bool - select SOC_FAMILY_IMX + select SOC_FAMILY_NXP_IMX config SOC_MIMX9352 bool diff --git a/soc/nxp/imx/soc.yml b/soc/nxp/imx/soc.yml index 44d3611323ae87..f097258c17f3f9 100644 --- a/soc/nxp/imx/soc.yml +++ b/soc/nxp/imx/soc.yml @@ -1,10 +1,33 @@ family: -- name: imx +- name: nxp_imx series: + - name: imx8 + socs: + - name: mimx8qm6 + cpuclusters: + - name: adsp + - name: a72 + - name: a53 + - name: m4 + - name: imx8x + socs: + - name: mimx8qx6 + cpuclusters: + - name: adsp + - name: a35 + - name: m4 + - name: imx8ulp + socs: + - name: imx8ulp + cpuclusters: + - name: adsp + - name: f1_dsp + - name: a35 - name: imx8m socs: - name: mimx8ml8 cpuclusters: + - name: adsp - name: a53 - name: m7 - name: mimx8mm6 diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.defconfig.imx8qm b/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.defconfig.imx8qm deleted file mode 100644 index e678be835925a2..00000000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.defconfig.imx8qm +++ /dev/null @@ -1,9 +0,0 @@ -# Copyright 2023 NXP -# SPDX-License-Identifier: Apache-2.0 - -if SOC_MIMX8QM_ADSP - -config SOC - default "mimx8qm6" - -endif # SOC_MIMX8QM_ADSP diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.defconfig.imx8qxp b/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.defconfig.imx8qxp deleted file mode 100644 index e4fcdd92fd0558..00000000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.defconfig.imx8qxp +++ /dev/null @@ -1,9 +0,0 @@ -# Copyright 2023 NXP -# SPDX-License-Identifier: Apache-2.0 - -if SOC_MIMX8QXP_ADSP - -config SOC - default "mimx8qx6" - -endif # SOC_MIMX8QXP_ADSP diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.defconfig.series b/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.defconfig.series deleted file mode 100644 index fdb3377328300e..00000000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.defconfig.series +++ /dev/null @@ -1,28 +0,0 @@ -# Copyright (c) 2021 NXP -# SPDX-License-Identifier: Apache-2.0 - -if SOC_SERIES_NXP_IMX8 - -config SOC_SERIES - string - default "imx8" - -config SOC_TOOLCHAIN_NAME - string - default "nxp_imx_adsp" - -config SYS_CLOCK_HW_CYCLES_PER_SEC - default 666000000 if XTENSA_TIMER - -config SYS_CLOCK_TICKS_PER_SEC - default 50000 - -config DCACHE_LINE_SIZE - default 128 - -config GEN_IRQ_VECTOR_TABLE - default n - -source "soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.defconfig.imx8q*" - -endif # SOC_SERIES_NXP_IMX8 diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.soc b/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.soc deleted file mode 100644 index 9033c869908816..00000000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.soc +++ /dev/null @@ -1,28 +0,0 @@ -# Copyright (c) 2021 NXP -# SPDX-License-Identifier: Apache-2.0 - -choice - prompt "NXP i.MX SoC Selection" - depends on SOC_SERIES_NXP_IMX8 - - config SOC_MIMX8QM_ADSP - bool "NXP i.MX8QM Audio DSP" - depends on SOC_SERIES_NXP_IMX8 - select HAS_MCUX - - config SOC_MIMX8QXP_ADSP - bool "NXP i.MX8QXP Audio DSP" - depends on SOC_SERIES_NXP_IMX8 - select HAS_MCUX -endchoice - -if SOC_SERIES_NXP_IMX8 - -config SOC_PART_NUMBER - string - default SOC_PART_NUMBER_MIMX8QM_DSP if SOC_MIMX8QM_ADSP - default SOC_PART_NUMBER_MIMX8QXP_DSP if SOC_MIMX8QXP_ADSP - -source "soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.soc.imx8q*" - -endif # SOC_SERIES_NXP_IMX8 diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.soc.imx8qm b/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.soc.imx8qm deleted file mode 100644 index fd5334cfee5d3b..00000000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.soc.imx8qm +++ /dev/null @@ -1,17 +0,0 @@ -# Copyright 2023 NXP -# SPDX-License-Identifier: Apache-2.0 - -if SOC_MIMX8QM_ADSP - -config SOC_PART_NUMBER_MIMX8QM6AVUFF - bool - -config SOC_PART_NUMBER_MIMX8QM_DSP - string - default "MIMX8QM6AVUFF_dsp" if SOC_PART_NUMBER_MIMX8QM6AVUFF - help - This string holds the full part number of the SoC. It is a hidden - option that you should not set directly. The part number selection - choice defines the default value for this string. - -endif # SOC_MIMX8QM_ADSP diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.soc.imx8qxp b/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.soc.imx8qxp deleted file mode 100644 index 20f0a13e11724f..00000000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8/Kconfig.soc.imx8qxp +++ /dev/null @@ -1,21 +0,0 @@ -# Copyright 2023 NXP -# SPDX-License-Identifier: Apache-2.0 - -if SOC_MIMX8QXP_ADSP - -config SOC_PART_NUMBER_MIMX8QX6AVLFZ - bool - -config SOC_PART_NUMBER_MIMX8QX6CVLDZ - bool - -config SOC_PART_NUMBER_MIMX8QXP_DSP - string - default "MIMX8QX6AVLFZ_dsp" if SOC_PART_NUMBER_MIMX8QX6AVLFZ - default "MIMX8QX6CVLDZ_dsp" if SOC_PART_NUMBER_MIMX8QX6CVLDZ - help - This string holds the full part number of the SoC. It is a hidden - option that you should not set directly. The part number selection - choice defines the default value for this string. - -endif # SOC_MIMX8QXP_ADSP diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8m/Kconfig.defconfig.series b/soc/soc_legacy/xtensa/nxp_adsp/imx8m/Kconfig.defconfig.series deleted file mode 100644 index 2d00a5e93d96f1..00000000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8m/Kconfig.defconfig.series +++ /dev/null @@ -1,37 +0,0 @@ -# Copyright (c) 2021 NXP -# SPDX-License-Identifier: Apache-2.0 - -if SOC_SERIES_NXP_IMX8M - -config SOC_SERIES - string - default "imx8m" - -config SOC_TOOLCHAIN_NAME - string - default "nxp_imx8m_adsp" - -if SOC_MIMX8M_ADSP - -config SOC - string - default "mimx8ml8" - -config SYS_CLOCK_HW_CYCLES_PER_SEC - default 800000000 if XTENSA_TIMER - -config SYS_CLOCK_TICKS_PER_SEC - default 50000 - -config DCACHE_LINE_SIZE - default 128 - -config DYNAMIC_INTERRUPTS - default y - -config GEN_IRQ_VECTOR_TABLE - default n - -endif # SOC_MIMX8M_ADSP - -endif # SOC_SERIES_NXP_IMX8M diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8m/Kconfig.soc b/soc/soc_legacy/xtensa/nxp_adsp/imx8m/Kconfig.soc deleted file mode 100644 index 5ad3c1b9b1ecca..00000000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8m/Kconfig.soc +++ /dev/null @@ -1,38 +0,0 @@ -# Copyright (c) 2021 NXP -# SPDX-License-Identifier: Apache-2.0 - -choice - prompt "NXP i.MX8M Audio DSP Selection" - depends on SOC_SERIES_NXP_IMX8M - - config SOC_MIMX8M_ADSP - bool "NXP i.MX8MP Audio DSP" - select HAS_MCUX if CLOCK_CONTROL - select HAS_MCUX_CCM if CLOCK_CONTROL - select HAS_MCUX_IOMUXC if PINCTRL - select PINCTRL_IMX if HAS_MCUX_IOMUXC - -endchoice - -if SOC_SERIES_NXP_IMX8M - -config SOC_PART_NUMBER_MIMX8ML8DVNLZ - bool - -config SOC_PART_NUMBER_MIMX8ML8CVNKZ - bool - -config SOC_PART_NUMBER_MIMX8MP_DSP - string - default "MIMX8ML8DVNLZ_dsp" if SOC_PART_NUMBER_MIMX8ML8DVNLZ - default "MIMX8ML8CVNKZ_dsp" if SOC_PART_NUMBER_MIMX8ML8CVNKZ - help - This string holds the full part number of the SoC. It is a hidden option - that you should not set directly. The part number selection choice defines - the default value for this string. - -config SOC_PART_NUMBER - string - default SOC_PART_NUMBER_MIMX8MP_DSP if SOC_MIMX8M_ADSP - -endif # SOC_SERIES_NXP_IMX8M diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/Kconfig.defconfig.series b/soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/Kconfig.defconfig.series deleted file mode 100644 index ebd9377660b018..00000000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/Kconfig.defconfig.series +++ /dev/null @@ -1,30 +0,0 @@ -# Copyright (c) 2023 NXP -# SPDX-License-Identifier: Apache-2.0 - -if SOC_SERIES_NXP_IMX8ULP - -config SOC_SERIES - string - default "imx8ulp" - -config SOC_TOOLCHAIN_NAME - string - default "nxp_imx8ulp_adsp" - -config SOC - string - default "nxp_imx8ulp" - -config SYS_CLOCK_HW_CYCLES_PER_SEC - default 528000000 if XTENSA_TIMER - -config SYS_CLOCK_TICKS_PER_SEC - default 50000 - -config DCACHE_LINE_SIZE - default 128 - -config GEN_IRQ_VECTOR_TABLE - default n - -endif # SOC_SERIES_NXP_IMX8ULP diff --git a/soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/Kconfig.soc b/soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/Kconfig.soc deleted file mode 100644 index b90fada22d4a4f..00000000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/imx8ulp/Kconfig.soc +++ /dev/null @@ -1,11 +0,0 @@ -# Copyright (c) 2023 NXP -# SPDX-License-Identifier: Apache-2.0 - -choice - prompt "NXP i.MX8ULP Audio DSP Selection" - depends on SOC_SERIES_NXP_IMX8ULP - - config SOC_NXP_IMX8ULP - bool "NXP i.MX8ULP Audio DSP" - -endchoice diff --git a/submanifests/optional.yaml b/submanifests/optional.yaml index dfde9064186d65..68f128a7a19505 100644 --- a/submanifests/optional.yaml +++ b/submanifests/optional.yaml @@ -34,7 +34,7 @@ manifest: groups: - optional - name: sof - revision: pull/39/head + revision: pull/41/head path: modules/audio/sof remote: upstream groups: diff --git a/west.yml b/west.yml index 90614214a2189e..010c239227efbc 100644 --- a/west.yml +++ b/west.yml @@ -253,7 +253,7 @@ manifest: groups: - hal - name: hal_xtensa - revision: 08325d6fb7190a105f5382d35e64ed2812c57cf4 + revision: pull/27/head path: modules/hal/xtensa groups: - hal