From e7964ddb26d441726a4b84f094042e58b6e7d0c1 Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Mon, 28 Aug 2023 08:23:47 -0700 Subject: [PATCH] soc/mt8195_adsp: Fix assembly for older toolchain The "addi.a" instruction referenced in this file doesn't build with non-Cadence assemblers. By name, it would seem to be a "add immediate single precision floating point", but the way it's used is clearly as an integer counter in a regular GPR. Use an addi, which seems to be the intent, to make this build. In practice this code won't ever be executed by Zephyr apps anyway. Signed-off-by: Andy Ross --- zephyr/soc/mt8195_adsp/xtensa/config/tie-asm.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/zephyr/soc/mt8195_adsp/xtensa/config/tie-asm.h b/zephyr/soc/mt8195_adsp/xtensa/config/tie-asm.h index fdae11e..510f2cc 100644 --- a/zephyr/soc/mt8195_adsp/xtensa/config/tie-asm.h +++ b/zephyr/soc/mt8195_adsp/xtensa/config/tie-asm.h @@ -164,7 +164,7 @@ ae_s64.i aed0, \ptr, .Lxchal_ofs_+40 ae_s64.i aed1, \ptr, .Lxchal_ofs_+48 ae_s64.i aed2, \ptr, .Lxchal_ofs_+56 - addi.a \ptr, \ptr, 64 + addi \ptr, \ptr, 64 ae_s64.i aed3, \ptr, .Lxchal_ofs_+0 ae_s64.i aed4, \ptr, .Lxchal_ofs_+8 ae_s64.i aed5, \ptr, .Lxchal_ofs_+16 @@ -173,7 +173,7 @@ ae_s64.i aed8, \ptr, .Lxchal_ofs_+40 ae_s64.i aed9, \ptr, .Lxchal_ofs_+48 ae_s64.i aed10, \ptr, .Lxchal_ofs_+56 - addi.a \ptr, \ptr, 64 + addi \ptr, \ptr, 64 ae_s64.i aed11, \ptr, .Lxchal_ofs_+0 ae_s64.i aed12, \ptr, .Lxchal_ofs_+8 ae_s64.i aed13, \ptr, .Lxchal_ofs_+16 @@ -189,10 +189,10 @@ s8i \at1, \ptr, .Lxchal_ofs_+43 ae_salign64.i u0, \ptr, .Lxchal_ofs_+48 ae_salign64.i u1, \ptr, .Lxchal_ofs_+56 - addi.a \ptr, \ptr, 64 + addi \ptr, \ptr, 64 ae_salign64.i u2, \ptr, .Lxchal_ofs_+0 ae_salign64.i u3, \ptr, .Lxchal_ofs_+8 - addi.a \ptr, \ptr, -192 + addi \ptr, \ptr, -192 ae_movvfcrfsr aed0 // ureg FCR_FSR ae_s64.i aed0, \ptr, .Lxchal_ofs_+0 + 0 rur.ae_ovf_sar \at1 // ureg 240 @@ -254,7 +254,7 @@ ae_l64.i aed0, \ptr, .Lxchal_ofs_+40 ae_l64.i aed1, \ptr, .Lxchal_ofs_+48 ae_l64.i aed2, \ptr, .Lxchal_ofs_+56 - addi.a \ptr, \ptr, 64 + addi \ptr, \ptr, 64 ae_l64.i aed3, \ptr, .Lxchal_ofs_+0 ae_l64.i aed4, \ptr, .Lxchal_ofs_+8 ae_l64.i aed5, \ptr, .Lxchal_ofs_+16 @@ -263,13 +263,13 @@ ae_l64.i aed8, \ptr, .Lxchal_ofs_+40 ae_l64.i aed9, \ptr, .Lxchal_ofs_+48 ae_l64.i aed10, \ptr, .Lxchal_ofs_+56 - addi.a \ptr, \ptr, 64 + addi \ptr, \ptr, 64 ae_l64.i aed11, \ptr, .Lxchal_ofs_+0 ae_l64.i aed12, \ptr, .Lxchal_ofs_+8 ae_l64.i aed13, \ptr, .Lxchal_ofs_+16 ae_l64.i aed14, \ptr, .Lxchal_ofs_+24 ae_l64.i aed15, \ptr, .Lxchal_ofs_+32 - addi.a \ptr, \ptr, 40 + addi \ptr, \ptr, 40 l8ui \at1, \ptr, .Lxchal_ofs_+0 ae_movea aep0, \at1 l8ui \at1, \ptr, .Lxchal_ofs_+1 @@ -278,7 +278,7 @@ ae_movea aep2, \at1 l8ui \at1, \ptr, .Lxchal_ofs_+3 ae_movea aep3, \at1 - addi.a \ptr, \ptr, 8 + addi \ptr, \ptr, 8 ae_lalign64.i u0, \ptr, .Lxchal_ofs_+0 ae_lalign64.i u1, \ptr, .Lxchal_ofs_+8 ae_lalign64.i u2, \ptr, .Lxchal_ofs_+16