Slow with many curly braces ({)

[richyliu]

In the following file, inserting a line before the last line is extremely slow

{
a {
}
a {
}
a {
}
a {
}
a {
}
a {
}
a {
}
a {
}
a {
}
} // insert a newline before me

Adding more a { and } in the above pattern increases the delay exponentially (or at least worst than linearly). The above is a minimally reproducible example. The following is an example of this issue in real SystemVerilog:

constraint instr_c {
  instr_type[0] -> {
    instr.i_type.opcode == op_imm;
    instr.r_type.funct3 == sr -> {
      instr.r_type.funct7 inside {base, variant};
    }
  }

  instr_type[1] -> {
      instr.r_type.opcode == op_reg;
  }

  instr_type[2] -> {
    instr.s_type.opcode == op_store;
    instr.s_type.funct3 inside {sw, sb, sh};
  }

  instr_type[3] -> {
    instr.i_type.opcode == op_load;
    instr.i_type.funct3 inside {lb, lh, lw, lbu, lhu};
  }

  instr_type[4] -> {
    instr.b_type.opcode == op_br;
    instr.b_type.funct3 inside {beq, bne, blt, bge, bltu, bgeu};
  }

  instr_type[5] -> {
    instr.i_type.opcode == op_jalr;
    instr.i_type.funct3 == 0;
  }

  instr_type[6] -> {
    instr.j_type.opcode == op_jal;
  }

  instr_type[7] -> {
    instr.u_type.opcode == op_auipc;
  }

  instr_type[8] -> {
    instr.u_type.opcode == op_lui;
  }
} // insert a newline before me

The following is the profiler results:

  501  62% - command-execute
  501  62%  - funcall-interactively
  497  62%   - evil-open-below
  497  62%    - apply
  497  62%     - +evil--insert-newline-below-and-respect-comments-a
  497  62%      - if
  497  62%       - let
  497  62%        - let*
  497  62%         - unwind-protect
  497  62%          - progn
  497  62%           - let
  497  62%            - funcall
  497  62%             - #<subr evil-open-below>
  496  62%              - indent-according-to-mode
  496  62%               - verilog-indent-line-relative
  496  62%                - verilog-continued-line
  496  62%                 - verilog-backward-token
  477  59%                  - verilog-at-close-constraint-p
  477  59%                   - verilog-in-coverage-p
  477  59%                    - verilog-at-constraint-p
  477  59%                     - verilog-beg-of-statement
  477  59%                      - verilog-backward-token
  477  59%                       - verilog-at-close-constraint-p
  477  59%                        - verilog-in-coverage-p
  477  59%                         - verilog-at-constraint-p
  477  59%                          - verilog-beg-of-statement
  477  59%                           - verilog-backward-token
  476  59%                            - verilog-at-close-constraint-p
  476  59%                             - verilog-in-coverage-p
  475  59%                              - verilog-at-constraint-p
  475  59%                               - verilog-beg-of-statement
  475  59%                                - verilog-backward-token
  349  43%                                 - verilog-at-close-constraint-p
  348  43%                                  - verilog-in-coverage-p
  336  42%                                   - verilog-at-constraint-p
   82  10%                                    - verilog-beg-of-statement
   45   5%                                     + verilog-backward-token
   27   3%                                     + verilog-forward-syntactic-ws
   10   1%                                       verilog-backward-syntactic-ws
   58   7%                                    + verilog-backward-ws&directives
   21   2%                                    + verilog-backward-token
    4   0%                                   + verilog-in-paren
  107  13%                                 + verilog-at-constraint-p
   19   2%                                 + verilog-backward-syntactic-ws
    1   0%                              + verilog-backward-up-list
    1   0%                              verilog-backward-syntactic-ws
   19   2%                  + verilog-at-constraint-p
    1   0%              + #<subr F616e6f6e796d6f75732d6c616d626461_anonymous_lambda_158>
    4   0%   + doom/toggle-profiler
  233  29% + ...
   60   7% + redisplay_internal (C function)
    1   0% + timer-event-handler
    1   0% + copilot--post-command
    1   0% + jsonrpc--process-filter

[wsnyder]

Good debugging! Perhaps you could propose a patch to fix this - maybe just short circuit when called recursively?

I'm not that familiar personally with the indentation side of Verilog-Mode, so don't have suggestions as to the best approach.