link.cfg

save-temps=1

[connectivity]
#nk=<kernel name>:<number>:<cu_name>.<cu_name>...
nk=krnl_reg:1:krnl_reg
nk=krnl_tsdf:1:krnl_tsdf

#sp=<kernel_name>.<port_name>:<sptag>

# Registration kernel port mappings
sp=krnl_reg.pointData0:HPC0
sp=krnl_reg.mapData00:HPC0
sp=krnl_reg.mapData01:HP0
sp=krnl_reg.mapData02:HP0

sp=krnl_reg.pointData1:HPC1
sp=krnl_reg.mapData10:HPC1
sp=krnl_reg.mapData11:HP1
sp=krnl_reg.mapData12:HP1

sp=krnl_reg.pointData2:HP2
sp=krnl_reg.mapData20:HP2
sp=krnl_reg.mapData21:HP3
sp=krnl_reg.mapData22:HP3

sp=krnl_reg.in_transform:HPC0

# TSDF kernel port mappings
sp=krnl_tsdf.scanPoints0:HPC0
sp=krnl_tsdf.scanPoints1:HPC0
sp=krnl_tsdf.scanPoints2:HPC1
sp=krnl_tsdf.scanPoints3:HPC1

sp=krnl_tsdf.mapData0:HP0
sp=krnl_tsdf.mapData1:HP1
sp=krnl_tsdf.mapData2:HP2
sp=krnl_tsdf.mapData3:HP3

sp=krnl_tsdf.new_entries0:HP0
sp=krnl_tsdf.new_entries1:HP1
sp=krnl_tsdf.new_entries2:HP2
sp=krnl_tsdf.new_entries3:HP3

[clock]
#freqHz=<freq in Hz>:<kernel1>,<kernel2>,...
freqHz=150000000:krnl_reg
freqHz=100000000:krnl_tsdf

[advanced]
param=compiler.addOutputTypes=sd_card

[vivado]
#Enable if timing fails
prop=run.impl_1.STRATEGY=Performance_Retiming