soc-design

Here are 14 public repositories matching this topic...

The-OpenROAD-Project / OpenLane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

magic asic rtl verilog vlsi foundry yosys klayout caravel netgen system-on-chip openroad openram skywater 130nm soc-design rtl2gds

Updated Oct 20, 2024
Python

arm-university / Advanced-System-on-Chip-Design-Education-Kit

Star

Design, implement, and test an Arm Cortex-A-based SoCs on FPGA hardware using functional specifications, standard hardware description and software programming languages

arm fpga armv7 hardware-designs cortex-a amba cortex-a9 arm-cortex-a9 soc-design system-on-chip-design zybo-z7-10

Updated Jul 26, 2024
HTML

nekosilverfox / ZYNQ

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⚙️ 基于 Zynq-7 全可编程 SoC 的设计

sdk fpga zynq verilog xilinx vivado zynq-7010 zynq-7000 soc-fpga zynq-7020 soc-design

Updated Dec 31, 2021
HTML

arm-university / Fundamentals-of-System-on-Chip-Design-on-Arm-Cortex-M-Microcontrollers

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A textbook on understanding system on chip design

fpga embedded-systems textbook cmsis soc fpga-soc trustzone amba cpu-architecture arm-cortex-m soc-design system-on-chip-design bus-architecture

Updated Jul 19, 2023

arm-university / System-on-Chip-Design-with-Arm-Cortex-M-Processors

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A reference book on System-on-Chip Design

cortex-m embedded-systems software-design amba arm-cortex-m soc-design keil-mdk system-on-chip-design bus-architecture cortex-m-processors reference-book

Updated Apr 5, 2024

arm-university / Modern-System-on-Chip-Design-on-Arm

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A textbook on system on chip design using Arm Cortex-A

textbook hardware-designs computer-architecture soc fpga-soc system-design soc-design system-on-chip-design arm-cortex-a

Updated May 14, 2024

Vor-Art / DCD_MultiBankMemory

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SystemVerilog implementation of a multi-bank memory as part of "[F23] Digital Circuit Design" course

fpga throughput systemverilog innopolis-university soc-design multibank-memory

Updated Dec 19, 2023
SystemVerilog

RISMicroDevices / OpenNCB

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Open-source Non-coherent CHI Bridge (CHI SN-F to AXI-4 bridge)

bus chisel chisel3 soc chi axi amba protocol-converter axi4 amba-axi soc-design amba-chi protocol-bridge

Updated Oct 9, 2024
Scala

iamstan13y / fomalhaut-microservices

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bootstrap docker redis mongodb postgresql web-api asp-net-core dapper grpc-service microservices-architecture solid-principles fluentvalidation rabbit-mq mediator-pattern razor-pages cqrs-pattern soc-design aggregator-services ocelot-api-gateway

Updated May 9, 2024
C#

amitops2103 / NASSCOM_VSD_SoC_Physical_Design_Program

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Digital VLSI Soc-Physical Design (Picorv32)

vlsi-physical-design soc-design physical-layout-analysis

Updated Sep 17, 2024

williaml33moore / bathtub

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BDD Gherkin implementation in native SystemVerilog, based on UVM.

asic fpga bdd bdd-specs rtl verilog systemverilog uvm verilog-hdl bdd-framework asic-verification design-verification asic-design rtl-design soc-design soc-verification uvm-verification

Updated Nov 16, 2024
SystemVerilog

Entries for the 2023 5th National College Student Integrated Circuit EDA Elite Challenge. SoC chip physical layout static IR drop prediction project based on methods such as image processing and NLP unsupervised learning.