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Docs: removed Chapter about VHDL Development Environment #1122

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@vogma vogma commented Dec 16, 2024

This fix closes #1114 .

I removed the entire chapter about the VHDL Development Environment. I think without the vunit specific explanation there is little use for a dedicated chapter about this topic. If you think there should still be an explanation let me know.

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umarcor commented Dec 16, 2024

The content is about using open source editor (VSCode) and language server (VHDL-LS).
The usage/existence of VUnit is optional.
If vhdl_ls.toml cannot be generated on-the-fly (because run.py was moved somewhere else), it can be added to this repo.
It's exactly the same as https://github.com/stnolting/neorv32/blob/main/rtl/file_list_cpu.f and https://github.com/stnolting/neorv32/blob/main/rtl/file_list_soc.f. Those are the "for synthesis" subset, and VHDL-LS needs the "for simulation" subset or "the whole" codebase. Hence, vhdl_ls.toml can be generated in https://github.com/stnolting/neorv32/blob/main/rtl/generate_file_lists.sh (or somewhere else) and added next to the .f files.

IMHO, the documentation is still pertinent, regardless of a vhdl_ls.toml being added to this repo.

@stnolting stnolting added the DOC Improvements or additions to documentation label Dec 17, 2024
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Documentation: Possibly outdated Reference to sim/run.py for VS Code VHDL LS Setup
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