NEORV32 as Vivado IP

[stnolting]

I was experimenting with Vivado, block designs and a large TCL script to provide a simple way pf packaging the processor as dedicated IP module (-> #894). The TCL script overrides the default configuration options to provide a quite fancy customization GUI. This is how it looks so far:

The synthesized design runs on an Arty-a7 board without any problems. 🚀

The script is still a bit experimental and I've only tested it with Vivado 2019 so far. So it would be great if someone else could test the script and the IP integration. 😉

[Sam-Vervaeck]

Probably not the most deep question, but as a beginner I have to start my understanding somewhere... :

How does using neorv32 as an IP change the way you can simulate program execution? From the user guide I figured out program simulation by following the section on installing a program directly into memory. Then I can just give the core a clk and it will automatically start executing the program. I assume it does not work the same way when used as an IP block in a block diagram?

[stnolting]

That does also work when you use the NEORV32 as IP block - you just need to re-package the core after updating/installing the program into it's memory.

[Sam-Vervaeck]

Ah that makes sense! Thank you I'll try that out!

[BEforlin]

Hi @stnolting,

I have been using the soc as a packaged IP for a while now, but its nice to have an official packaged version, thanks for that!

I have tested the script and packaging with Vivado 2023.2 works fine. I am in the process of creating a bigger design with the core on the block diagram, if I encounter any issues I will reply here, but so far so good.

Small comments:

• On the User guide bullet point 4. Execute source source neorv32_vivado_ip.tcl in the TCL console. Source is written 2 times.
• The default option for clock frequency in the customization GUI is 0, is this intended?
• I just noticed that changing the "GPIO port pins" in the customization GUI does not actually change the number of exposed pins.

[stnolting]

I have tested the script and packaging with Vivado 2023.2 works fine. I am in the process of creating a bigger design with the core on the block diagram, if I encounter any issues I will reply here, but so far so good.

Sounds great! I look forward to hearing what you have to report 😉

On the User guide bullet point 4. Execute source source neorv32_vivado_ip.tcl in the TCL console. Source is written 2 times.

Oh, typo! I'll fix that!

The default option for clock frequency in the customization GUI is 0, is this intended?

Hm right... Maybe I can try to remove the default value so that the user is forced to configure this.

I just noticed that changing the "GPIO port pins" in the customization GUI does not actually change the number of exposed pins.

That is also something I am working on. The idea behind this for the "normal" top entity is that you always get the same entity regardless of the actual configuration. But the for the IP block this is unpretty as you need to use slice/concat components to always make a 64-bit port even if you just need one IO pin.

[stnolting]

Btw, I am working on auto-resizing ports in #913.

[robhancocksed]

One thing that's unclear is that in the case where the boot loader is not being used and you created a custom IMEM image to build into the core, previously we just excluded the neorv32_application_image.vhd file from the build and included our own generated VHDL file instead. I'm not sure if there is a way to do that with the IP package at the moment? It seems like it just pulls in all VHDL files from rtl/core right now.

[Sam-Vervaeck]

@stnolting Maybe it is a good idea to replace the VHDL2008 disclaimer in the user guide by the findings in this thread on how to put a new program into the IP block.

[stnolting]

@Sam-Vervaeck good idea. Do you have a suggestion for a specific wording?

[Sam-Vervaeck]

Goh nothing special I guess. Maybe something like:

In case an executable is installed directly into the IMEM, as explained in Section 6, the program executed by the IP block after the reset signal is given cannot be updated by only replacing the neorv32_application_image.vhd file in the packaged_ip folder. For the Vivado design suite, the new program to be executed must be compiled using the install flag, next the source neorv32_vivado_ip.tcl script has to be executed again in the neorv32/rtl/system_integration folder, and finally Vivado will propt the upgrade IP request. Now, the IP block will execute the new program when execution starts after the reset signal.

[stnolting]

Sounds good, I'll add that! 👍

By the way, you can also suggest (such) changes directly as a pull request. 😉

[Sam-Vervaeck]

I have not done that yet but I guess now is as good a time as ever to try it for the first time. Let me look into it :)