Gearbox.vhd: changed the type of the generic parameter RST_POLARITY_G from sl to boolean

[king-pietro]

Gearbox.vhd: changed the type of the generic parameter RST_POLARITY_G from sl to boolean

Description

The type of generic parameter RST_POLARITY_G in Gearbox.vhd has been changed from sl to boolean.
RST_POLARITY_G now controls a new constant sl called RST_POLARITY_C, which acts exactly as the generic acted previously.

Details

When using a Verilog wrapper around the gearbox, if you tried to set the RST_POLARITY_G generic to either '0' or '1', the simulation would give you a wrong result as its not possible to use sl as parameters in verilog: https://stackoverflow.com/questions/32218950/instantiate-vhdl-in-verilog-with-generics-containing-std-logic
Changing its type to boolean fixes the problem

[king-pietro]

@ruck314 another "bug" I saw while changing the reset is that:
If the gearbox is in reset state, but I still give clk and slaveValid, the signal slaveReady is moving nonetheless (while the other signals are reset as they should).
This is due to the fact that in the FSM, slaveReady is asserted before the reset of v.

surf/base/general/rtl/Gearbox.vhd

Lines 152 to 160 in d92f7c4

	slaveReady <= v.slaveReady;
	if (RST_ASYNC_G = false and rst = RST_POLARITY_G) then
	v := REG_INIT_C;
	end if;
	rin <= v;

I don't know if it was done on purpose or not. If it's a bug the bug-fix is to just move down that line of code aftere the reset