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Updating AxiStreamRingBuffer.vhd #1116

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merged 1 commit into from
Sep 27, 2023
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ruck314
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@ruck314 ruck314 commented Sep 27, 2023

Description

  • adding support for COMMON_CLK_G when (dataClk=axilClk) case

adding support for COMMON_CLK_G when (dataClk=axilClk) case
@ruck314 ruck314 requested a review from jumdz September 27, 2023 17:15
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jumdz commented Sep 27, 2023

Sounds good to me but, couldn't it be even improve by disabling the synchronizer fifos when the COMMON_CLK_G is set to true ?

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ruck314 commented Sep 27, 2023

@jumdz Required if we want to build with URAM (single clock domain RAM) for the ring buffer memory

@ruck314 ruck314 merged commit 371ed89 into pre-release Sep 27, 2023
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@ruck314 ruck314 deleted the AxiStreamRingBuffer-update branch September 27, 2023 17:34
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2 participants